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📄 tblacpi.equ

📁 dos下的USB源码(包括UHCI
💻 EQU
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	intover_length		db  10	; always 10
	intover_source_bus	db  0	; Constant ISA '0'
	intover_irq_src		db  0	; Bus-relative interrupt source (IRQ)
	intover_glb_sys_vect	dd  0	; The Global System Interrupt Vector that this bus-relative interrupt source will trigger [OEMTACPI.EQU]
	intover_flags		dw  0	; MPS INTI flags [OEMTACPI.EQU]

apic_intover ends

;-----------------------------------------------------------------------;
;<AMI_THDR_START>
;----------------------------------------------------------------------------
;
; Name:	      	apic_nmiover 
;
; Type:		Data Array
;
; Description:	IO APIC NMI Interrupt override generic structure. Used within MAPIC table
;
; Referrals:	APIC
; 
; Notes: 	ACPI 2.0 introduced APIC structures
;
;----------------------------------------------------------------------------
;<AMI_THDR_END>
apic_nmiover struct	

	nover_struc_type	db  3
	nover_length		db  8	; always 8
	nover_flags		dw  0	; 0 - Conforms to specifications of the bus (for example, ISA is edge-triggered)
	nover_glb_sys_vect	dd  0	; GLB_NMI_INTR_OVER_SRC   ; System Vector Index

apic_nmiover ends

;-----------------------------------------------------------------------;
; ACPI 2.0 introduced APIC structures
;-----------------------------------------------------------------------;
;<AMI_THDR_START>
;----------------------------------------------------------------------------
;
; Name:	      	Lapic_nmi 
;
; Type:		Data Array
;
; Description:	Local APIC NMI Structure. Used within MAPIC table
;
; Referrals:	APIC
; 
; Notes: 	ACPI 2.0 introduced APIC structures
;
;----------------------------------------------------------------------------
;<AMI_THDR_END>
Lapic_nmi struct

	Lanmi_struc_type	db  4
	Lanmi_proc_length	db  6	; always 6
	Lanmi_proc_id		db  0	; Should match ProcessorID in ASL scope
					; Processor ID corresponding to the ID listed in the processor object.
					; A value of 0xff signifies that this applies to all processors in the machine.
	Lanmi_flags		dw  0	; MPS INTI flags [OEMTACPI.EQU]
	Lanmi_lint		db  0	; Local APIC interrupt input LINTn to which NMI is connected.

Lapic_nmi ends

;-----------------------------------------------------------------------;
;<AMI_THDR_START>
;----------------------------------------------------------------------------
;
; Name:	      	Lapic_adrover
;
; Type:		Data Array
;
; Description:	Local APIC Address Override Structure. Used within MAPIC table
;
; Referrals:	APIC
; 
; Notes: 	ACPI 2.0 introduced APIC structures
;
;----------------------------------------------------------------------------
;<AMI_THDR_END>
Lapic_adrover struct

	Ladrover_struc_type	db  5
	Ladrover_proc_length	db  12	; always 12
	Ladrover_res		dw  0	; Reserved, should be 0
	Ladrover_addr_Lo	dd  0	; Physical address of Local APIC Low dWord
	Ladrover_addr_Hi	dd  0	; Physical address of Local APIC High dWord

Lapic_adrover ends

;<AMI_THDR_START>
;----------------------------------------------------------------------------
;
; Name:	      	ioSapic
;
; Type:		Data Array
;
; Description:	The I/O SAPIC structure is very similar to the I/O APIC structure. 
; 	If both I/O APIC and I/O SAPIC structures exist for a specific APIC ID, 
; 	the information in the I/O SAPIC structure must be used.
; 	The I/O SAPIC structure uses the I/O_APIC_ID field as defined in the I/O APIC table. 
; 	The Vector_Base field remains unchanged but has been moved. The I/O APIC address has been deleted. 
; 	A new address and reserved field have been added.Used within MAPIC table
;
; Referrals:	APIC
; 
; Notes: 	ACPI 2.0 introduced APIC structures
;
;----------------------------------------------------------------------------
;<AMI_THDR_END>
ioSapic struct

	ioSapic_struc_type	db  6
	ioSapic_length		db  16	; always 16
	ioSapic_id		db  0	; I/O SAPIC ID
	ioSapic_resv		db  0	; Reserved (must be zero)
	ioSapic_sys_vect	dd  0	; The global system interrupt number where this I/O SAPIC's interrupt 
					; inputs start. The number of interrupt inputs is determined by the 
					; I/O SAPIC's Max Redir Entry register.Global System Interrupt Base
	ioSapic_addr_Lo		dd  0	; The 64-bit physical address to access this I/O SAPIC. 
	ioSapic_addr_Hi		dd  0	; Each I/O SAPIC resides at a unique address.

ioSapic ends

;<AMI_THDR_START>
;----------------------------------------------------------------------------
;
; Name:	      	LSapic_proc
;
; Type:		Data Array
;
; Description:	Processor Local SAPIC structure.The Processor local SAPIC structure is very similar to the processor local APIC structure. 
; When using the SAPIC interrupt model, each processor in the system is required to have a 
; Processor Local SAPIC record and an ACPI Processor object. OSPM does not expect the 
; information provided in this table to be updated if the processor information changes 
; during the lifespan of an OS boot. While in the sleeping state, processors are not allowed 
; to be added, removed, nor can their SAPIC ID or Flags change. When a processor is not present, 
; the Processor Local SAPIC information is either not reported or flagged as disabled.
; Used within MAPIC table
;
; Referrals:	APIC
; 
; Notes: 	ACPI 2.0 introduced APIC structures
;
;----------------------------------------------------------------------------
;<AMI_THDR_END>
LSapic_proc struct

	LSapic_proc_struc_type	db  7
	LSapic_proc_length	db  10	; always 10
	LSapic_proc_id		dw  0	; The Processor Id listed in the processor object. 
	LSapic_proc_flags	dd  0	; Local SAPIC flags. Not usable(0)/Usable(1) - updated in TBLACPI.ASM
	LSapic_id		db  0	; The processor's local SAPIC ID
	LSapic_eid		db  0	; The processor's local SAPIC EID

LSapic_proc ends

;-----------------------------------------------------------------------;
; Platform Interrupt Sources Structure
;-----------------------------------------------------------------------;
;<AMI_THDR_START>
;----------------------------------------------------------------------------
;
; Name:	      	platform_intover
;
; Type:		Data Array
;
; Description:	Platform Interrupt Sources Structure. Used within MAPIC table
;
; Referrals:	APIC
; 
; Notes: 	ACPI 2.0 introduced APIC structures
;
;----------------------------------------------------------------------------
;<AMI_THDR_END>

platform_intover struct	

	pintover_struc_type	db  8
	pintover_length		db  16	; always 8
	pintover_flags		dw  0	; MPS INTI flags
					; 0 - Conforms to specifications of the bus (for example, ISA is edge-triggered)
	pintover_intype		db  0	; 1-PMI
					; 2-INIT
					; 3-Corrected Platform Error Interrupt
					; All other values are reserved.
	pintover_glb_sys_int	dd  0	; The Global System Interrupt that this platform interrupt will signal.
	pintover_res		dd  0	; Reserved, must be zero.

platform_intover ends

;;;;;;;;;;;;;;
; Macros to update ACPI APIC entries for Local & IO APICs
;;;;;;;;;;;;;;
CreateLocalAPICentry  macro	nCPU

	LOCAL	cpu_id, lapic_id
IF nCPU GE 1
	cpu_id = 1		; CPU_ID index is '1' based
	lapic_id = 080h		; Default Local_APIC_ID is '80' based to avoid overlapping with IO APIC IDs.
	REPEAT	nCPU		; L_APIC_IDs will be updated in POST

		Lapic_proc {0, 8, cpu_id, lapic_id, 0}	; Initialize all CPUs as unusable
;		Lapic_nmi<,,cpu_id, 5, 1>		; Local APIC NMI Structure: Flags: Edge trig. Active High, Int NMI - 1;
; LSapic_proc structure is reserved for Processors that can use the SAPIC interrupt model
;		LSapic_proc {7, 10, cpu_id, 0, 0, 0}	; Initialize all CPUs as unusable
		cpu_id = cpu_id+1
		lapic_id = lapic_id+1

	ENDM
ENDIF
ENDM

CreateIOAPICentry  macro	nIOAPICs

	LOCAL	count, apic_id, apic_mem_base, apic_int_vect
IF nIOAPICs GE 1
	count = 1		; IO APIC_ID is '1' based
	REPEAT	nIOAPICs
		apic_id TEXTEQU @CATSTR(<MKF_IO_APIC>, <%count>, <_ID>)
		apic_mem_base TEXTEQU @CATSTR(<MKF_IO_APIC>, <%count>, <_BASE_ADDRESS>)
		apic_int_vect TEXTEQU @CATSTR(<MKF_IO_APIC>, <%count>, <_INT_VECTOR>)
		apic_ioapic {1, 12, apic_id, 0, apic_mem_base, apic_int_vect}
; ioSapic structures are reserved for IO APICs that supports SAPIC interrupt model
;		ioSapic {6, 16, apic_id, 0, apic_int_vect, apic_mem_base, 0}
		count = count+1

	ENDM
ENDIF
ENDM	
;;;;;;;;;;;;;;;
ENDIF

;-----------------------------------------------------------------------;
;     *****************************************************************;
;     *****************************************************************;
;     **                                                             **;
;     **      (C)Copyright 1985-2001, American Megatrends, Inc.      **;
;     **                                                             **;
;     **                     All Rights Reserved.                    **;
;     **                                                             **;
;     **           6145-F Northbelt Pkwy, Norcross, GA 30071         **;
;     **                                                             **;
;     **                     Phone (770)-246-8600                    **;
;     **                                                             **;
;     *****************************************************************;
;     *****************************************************************;
endif   ;_acpi_equ_

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