📄 uhci.equ
字号:
ECHO -- Including: UHCI.EQU
;***************************************************************************;
;***************************************************************************;
;** **;
;** (C)Copyright 1985-2002, American Megatrends, Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
;** **;
;** Phone (770)-246-8600 **;
;** **;
;***************************************************************************;
;***************************************************************************;
;***************************************************************************;
; $Header: /BIOS/Corebin/800/Modules/USB2/Template/Core/UHCI.EQU 2 10/14/02 8:50p Sivagarn $
;
; $Revision: 2 $
;
; $Date: 10/14/02 8:50p $
;***************************************************************************;
; Revision History
; ----------------
; $Log: /BIOS/Corebin/800/Modules/USB2/Template/Core/UHCI.EQU $
;
; 2 10/14/02 8:50p Sivagarn
; * Equate names are changed
;
; 1 9/15/02 5:39p Sivagarn
; Initial AMIUSB 2.20 check-in
;
;***************************************************************************;
IFNDEF __UHCI_EQU
__UHCI_EQU EQU 1
;----------------------------------------------------------------------------
; UHCI I/O register read access equates
;----------------------------------------------------------------------------
;
; Equates for UHCI I/O mapped registers (offsets from base address)
;
UHCI_COMMAND_REG EQU 000h
UHCI_STATUS_REG EQU 002h
UHCI_INTERRUPT_ENABLE EQU 004h
UHCI_FRAME_NUM EQU 006h
UHCI_FRAME_LIST_BASE EQU 008h
UHCI_SOF_MODIFY EQU 00Ch
UHCI_PORT1_CONTROL EQU 010h
UHCi_PORT2_CONTROL EQU 012h
;
; Bit definitions for UHCI command register
;
UHC_HOST_CONTROLLER_RUN EQU 001h
UHC_HOST_CONTROLLER_RESET EQU 002h
UHC_GLOBAL_RESET EQU 004h
UHC_ENTER_SUSPEND EQU 008h
UHC_FORCE_RESUME EQU 010h
UHC_CONFIGURE_FLAG EQU 040h
UHC_MAX_PACKET_64_BYTE EQU 080h
;
; Bit definitions for UHCI status register
;
UHC_USB_INTERRUPT EQU 001h
UHC_USB_ERROR_INTERRUPT EQU 002h
UHC_RESUME_RECEIVED EQU 004h
UHC_PCI_BUS_ERROR EQU 008h
UHC_HC_PROCESS_ERROR EQU 010h
UHC_HC_HALTED EQU 020h
;
; Bit definitions for USB interrupt enable register
;
UHC_TIMEOUT_CRC_ENABLE EQU 001h
UHC_RESUME_ENABLE EQU 002h
UHC_IOC_ENABLE EQU 004h
UHC_SHORT_PACKET_ENABLE EQU 008h
;
; Bit definitions for Port Status and Control
;
UHC_CONNECT_STATUS EQU 0001h
UHC_CONNECT_STATUS_CHANGE EQU 0002h
UHC_PORT_ENABLE EQU 0004h
UHC_PORT_ENABLE_CHANGE EQU 0008h
UHC_LINE_STATUS EQU 0030h
UHC_LINE_STATUS_CHANGE EQU 0040h
UHC_LOW_SPEED_ATTACHED EQU 0100h
UHC_PORT_RESET EQU 0200h
UHC_PORT_SUSPEND EQU 0400h
;----------------------------------------------------------------------------
; UHCI Controller Port 60/64h trapping flags
;----------------------------------------------------------------------------
UHCI_TRAP_PORT_60h_READ EQU BIT0
UHCI_TRAP_PORT_60h_WRITE EQU BIT1
UHCI_TRAP_PORT_64h_READ EQU BIT2
UHCI_TRAP_PORT_64h_WRITE EQU BIT3
UHCI_SMI_ON_USB_INTERRUPT EQU BIT4
UHCI_TRAP_FLAG EQU (UHCI_SMI_ON_USB_INTERRUPT)
;
; Equates for register width flag
;
IO_BYTE EQU 020h
IO_WORD EQU 030h
IO_DWORD EQU 040h
;----------------------------------------------------------------------------
; USB UHCI data size equates
;----------------------------------------------------------------------------
UHCI_FRAME_LIST_SIZE EQU 1024 ; Number of DWORDs in frame list
; Note: If additional space is needed in USB data segment,
; MAX_UHCI_BULK_DATA_SIZE can be changed to 200h without significant
; decrease in mass storage data transfer performance
MAX_UHCI_BULK_DATA_SIZE EQU 400h ; Maximum amount of data to transfer
CONTROL_DATA_TD_COUNT EQU MAX_CONTROL_DATA_SIZE / 8
;Total number of ControlDataTds that
; may be used to send/receive data
; in control transfers.
BULK_DATA_TD_COUNT EQU MAX_UHCI_BULK_DATA_SIZE / 64
; Total number of BulkDataTds that
; may be used to send/receive data
; in bulk transfers assuming max
; data packet size of 64 bytes
;<AMI_SHDR_START>
;----------------------------------------------------------------------------
; Name: UHCIDescriptors
;
; Description: Descriptors structure is used to hold the host controller
; instance specific transfer descriptor and queue head
; pointers. The following structure defines such the
; descriptors for UHCI based host controller instances.
;
; Fields: Name Type Description
; ------------------------------------------------------------
; TD1ms UHCI_TD TD scheduled in 1ms timeframe
; TD2ms UHCI_TD TD scheduled in 2ms timeframe
; TD8ms UHCI_TD TD scheduled in 8ms timeframe
; TD256ms UHCI_TD TD scheduled in 256ms timeframe
; TDRootHub UHCI_TD TD used to poll root hub it is scheduled to 256ms timeframe
; QHBulk UHCI_QH Queue head associated with bulk transfer
; QHControl UHCI_QH Queue head associated with control transfer
; TDBulkData UHCI_TD TD associated to transfer bulk data
; TDInterruptData UHCI_TD TD associated to transfer interrupt data
; TDRepeat UHCI_TD TD associated with generation of repeat data
; TDControlSetup UHCI_TD TD associated with control setup
; TDControlStatus UHCI_TD TD associated with control status
;
;----------------------------------------------------------------------------
;<AMI_SHDR_END>
UHCIDescriptors STRUC
TD1ms DW ?
TD2ms DW ?
TD8ms DW ?
TD256ms DW ?
TDRootHub DW ?
QHBulk DW ?
QHControl DW ?
TDBulkData DW ?
TDInterruptData DW ?
TDRepeat DW ?
TDControlSetup DW ?
TDControlStatus DW ?
UHCIDescriptors ENDS
USB_UHCI_DESCRIPTOR_SIZE_BLK EQU ((SIZE UHCIDescriptors + \
USB_MEM_BLK_SIZE - 1) SHR \
USB_MEM_BLK_SIZE_SHIFT)
; Transfer Descriptor (TD) Structure
;-------------------------------------------------------------------------
FUNCCALLBACK PROTO NEAR C
; Function prototype for TD call back routine
FUNCTDCALLBACK TYPEDEF PROTO NEAR C pHCStruc:NEAR, pDevInfo:NEAR,
pTD:NEAR
PTRFUNCTDCALLBACK TYPEDEF PTR FUNCTDCALLBACK
;<AMI_SHDR_START>
;----------------------------------------------------------------------------
; Name: UHCI_TD
;
; Description: UHCI transfer descriptor structure. This structure is used
; for all USB transactions in UHCI based host controller.
; TD contains relevent information for the transaction.
; Refer to UHCI specification for more information. The last
; sixteen bytes in the structure (after BufferPointer) is
; AMIBIOS internal data structure.
;
; Fields: Name Type Description
; ------------------------------------------------------------
; LinkPointer DWORD Pointer to the next QH/TD
; ControlStatus DWORD Control & status (UHCI_TD_CONTROL_STATUS)
; Token DWORD Token field (UHCI_TD_TOKEN)
; BufferPointer DWORD Pointer to the transaction buffer
; CSReloadValue DWORD Copy of control status during scheduling
; pCallback NEAR Pointer to call back function
; ActiveFlag BYTE Non-zero value indicates TD is active
; Reserved BYTE Reserved
; DataArea ARRAY 8 bytes of setup data buffer
;
;----------------------------------------------------------------------------
;<AMI_SHDR_END>
UHCI_TD STRUC
LinkPointer DD ? ; This part of the TD is defined
ControlStatus DD ? ; by the Intel Universal Host
Token DD ? ; Controller Interface (UHCI)
BufferPointer DD ? ; specification
CSReloadValue DD ? ; Value to reload into TD_Control_Status
pCallback PTRFUNCTDCALLBACK ? ; Offset of routine to call on completion
ActiveFlag DB ? ; If nonzero, TD is active
Reserved DB ?
DataArea DB 8 DUP (?) ;Data buffer for TD
UHCI_TD ENDS
;<AMI_SHDR_START>
;----------------------------------------------------------------------------
; Name: UHCI_TD_CONTROL_STATUS
;
; Description: Bit definition for UHCI_TD control status field
;
; Fields: Name Type Description
; ------------------------------------------------------------
; ActLength BITS:10-00 Actual length transferred (N-1)
; Reserved BITS:16-11 Reserved bits
; BitStuff BITS:17 Bit stuff error bit
; CRCTimeout BITS:18 CRC/timeout error bit
; NAKRcvd BITS:19 NAK received
; BabbleDetec BITS:20 Babble condition detected
; DataBufError BITS:21 Data buffer error
; Stalled BITS:22 Endpoint stalled
; Active BITS:23 TD is active (under HC control)
; IOC BITS:24 Set to interrupt on completion
; LowSpeed BITS:25 Set for low speed device
; IOS BITS:26 Set for isochronous transfer
; ErrorCount BITS:28-27 Error counter
; ShortPacket BITS:29 Set to detect short packet
; Reserved BITS:31-30 Reserved bits
;
;----------------------------------------------------------------------------
;<AMI_SHDR_END>
;<AMI_SHDR_START>
;----------------------------------------------------------------------------
; Name: UHCI_TD_TOKEN
;
; Description: Bit definition for UHCI_TD token field
;
; Fields: Name Type Description
; ------------------------------------------------------------
; PID BITS:07-00 Packet identification
; DevAddress BITS:14-08 USB device address
; EndpointNum BITS:18-15 Endpoint number
; DataToggle BITS:19 Data toggle
; Reserved BITS:20 Reserved bit
; MaxLen BITS:31-21 Maximum data length (N-1)
;
;----------------------------------------------------------------------------
;<AMI_SHDR_END>
DEFAULT_PACKET_LENGTH EQU 8 ; Max size of packet data
;<AMI_SHDR_START>
;----------------------------------------------------------------------------
; Name: UHCI_QH
;
; Description: UHCI queue head structure. This structure is used to link
; multiple TDs and process them in a order. Queue head is
; very useful if the transaction has to be stopped if one
; of the TD is failed. Refer to UHCI specification
; for more information
;
; Fields: Name Type Description
; ------------------------------------------------------------
; LinkPointer DWORD Pointer to the next QH/TD
; ElementPointer DWORD Pointer to the first element in the queue
;
;----------------------------------------------------------------------------
;<AMI_SHDR_END>
UHCI_QH STRUC
LinkPointer DD ? ; Pointer to the next queue head
ElementPointer DD ? ; Pointer to first element in this queue
UHCI_QH ENDS
;
; Bit definitions for a generic pointer
;
UHCI_TERMINATE EQU 000000001h
UHCI_QUEUE_HEAD EQU 000000002h
UHCI_VERTICAL_FLAG EQU 000000004h
;
; Bit definitions for transfer descriptor control and status
;
UHCI_TD_DATA_LENGTH EQU 0000007FFh
UHCI_TD_STATUS_FIELD EQU 000FE0000h
UHCI_TD_BITSTUFF_ERROR EQU 000020000h
UHCI_TD_CRC_TIMEOUT_ERROR EQU 000040000h
UHCI_TD_NAK_RECEIVED EQU 000080000h
UHCI_TD_BABBLE_DETECTED EQU 000100000h
UHCI_TD_DATA_BUFFER_ERROR EQU 000200000h
UHCI_TD_STALLED EQU 000400000h
UHCI_TD_ACTIVE EQU 000800000h
UHCI_TD_INTERRUPT_ON_COMPLETE EQU 001000000h
UHCI_TD_ISOCHRONOUS_SELECT EQU 002000000h
UHCI_TD_LOW_SPEED_DEVICE EQU 004000000h
UHCI_TD_ERROR_COUNTER EQU 018000000h
UHCI_TD_ONE_ERROR EQU 008000000h
UHCI_TD_TWO_ERRORS EQU 010000000h
UHCI_TD_THREE_ERRORS EQU 018000000h
UHCI_TD_SHORT_PACKET_DETECT EQU 020000000h
;
; Bit definitions for transfer descriptor token
;
PACKET_ID EQU 0000000ffh
IN_PACKET EQU 01101001b
OUT_PACKET EQU 11100001b
SETUP_PACKET EQU 00101101b
DEVICE_ADDRESS EQU 000007f00h
ENDPOINT EQU 000078000h
DATA_TOGGLE EQU 000080000h
MAX_LENGTH EQU 0FFE00000h
ENDIF
;***************************************************************************;
;***************************************************************************;
;** **;
;** (C)Copyright 1985-2002, American Megatrends, Inc. **;
;** **;
;** All Rights Reserved. **;
;** **;
;** 6145-F Northbelt Pkwy, Norcross, GA 30071 **;
;** **;
;** Phone (770)-246-8600 **;
;** **;
;***************************************************************************;
;***************************************************************************;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -