can162.lst

Atmel mcu can interface design example

__start:
__text_start:
    003D E5CF      LDI	R28,0x5F
    003E E0D4      LDI	R29,4
    003F BFCD      OUT	P3D,R28
    0040 BFDE      OUT	P3E,R29
    0041 51C0      SUBI	R28,0x10
    0042 40D0      SBCI	R29,0
    0043 EA0A      LDI	R16,0xAA
    0044 8308      STD	R16,0+Y
    0045 2400      CLR	R0
    0046 E7EA      LDI	R30,0x7A
    0047 E0F0      LDI	R31,0
    0048 E010      LDI	R17,0
    0049 39E9      CPI	R30,0x99
    004A 07F1      CPC	R31,R17
    004B F011      BEQ	0x004E
    004C 9201      ST	R0,Z+
    004D CFFB      RJMP	0x0049
    004E 8300      STD	R16,0+Z
    004F E6E0      LDI	R30,0x60
    0050 E0F0      LDI	R31,0
    0051 E6A0      LDI	R26,0x60
    0052 E0B0      LDI	R27,0
    0053 E010      LDI	R17,0
    0054 37EA      CPI	R30,0x7A
    0055 07F1      CPC	R31,R17
    0056 F021      BEQ	0x005B
    0057 95C8      LPM
    0058 9631      ADIW	R30,1
    0059 920D      ST	R0,X+
    005A CFF9      RJMP	0x0054
    005B 940E0114  CALL	_main
_exit:
    005D CFFF      RJMP	_exit
FILE: D:\candesignnow\CAN162.c
(0001) //ICC-AVR application builder : 2007-7-21 15:11:59
(0002) // Target : M162
(0003) // Crystal: 16.000Mhz
(0004) 
(0005) #include <iom162v.h>
(0006) #include <macros.h>
(0007) #include "can.h"
(0008) //extern unsigned char RX_Buffer[13];
(0009) //#define uchar unsigned char 
(0010) //#define uint  unsigned int
(0011) unsigned char TX_Buffer[13];
(0012) unsigned char RX_Buffer[13];
(0013) unsigned char timer_ok;
(0014) unsigned char timer_count;
(0015) unsigned char RevFlag;
(0016) unsigned int count;
(0017) 
(0018) /**********************************************************
(0019)                      软延时
(0020) **********************************************************/					 
(0021) 					 
(0022) void delay_1ms(void) 
(0023) {
(0024)  unsigned int k; 
(0025)  for(k = 0; k < (16*142 - 2); k++) // 定时1ms公式：xtal*142-2
_delay_1ms:
  k                    --> R16
    005E 2700      CLR	R16
    005F 2711      CLR	R17
    0060 C002      RJMP	0x0063
    0061 5F0F      SUBI	R16,0xFF
    0062 4F1F      SBCI	R17,0xFF
    0063 3D0E      CPI	R16,0xDE
    0064 E0E8      LDI	R30,0x8
    0065 071E      CPC	R17,R30
    0066 F3D0      BCS	0x0061
(0026)  	 ;  
(0027) 	 //for(k = 0; k < 2; k++);
(0028) }
    0067 9508      RET
_Delay:
  p                    --> R20
  n                    --> R22
    0068 940E04AE  CALL	push_gset2
    006A 01B8      MOVW	R22,R16
(0029) void Delay(unsigned int n)
(0030) {
(0031)  unsigned int p; 
(0032)  for(p = 0; p < n; p++) 
    006B 2744      CLR	R20
    006C 2755      CLR	R21
    006D C003      RJMP	0x0071
(0033)  {
(0034) 	   delay_1ms();
    006E DFEF      RCALL	_delay_1ms
    006F 5F4F      SUBI	R20,0xFF
    0070 4F5F      SBCI	R21,0xFF
    0071 1746      CP	R20,R22
    0072 0757      CPC	R21,R23
    0073 F3D0      BCS	0x006E
(0035)  }
(0036) }
    0074 940E04BE  CALL	pop_gset2
    0076 9508      RET
(0037) 
(0038) void port_init(void)
(0039) {
(0040)    PORTA = 0x00;
_port_init:
    0077 2422      CLR	R2
    0078 BA2B      OUT	P1B,R2
(0041)    DDRA  = 0xFF;
    0079 EF8F      LDI	R24,0xFF
    007A BB8A      OUT	P1A,R24
(0042)    PORTB = 0xF0;
    007B EF80      LDI	R24,0xF0
    007C BB88      OUT	P18,R24
(0043)    DDRB  = 0x00;
    007D BA27      OUT	P17,R2
(0044)    PORTC = 0x7F; 
    007E E78F      LDI	R24,0x7F
    007F BB85      OUT	P15,R24
(0045)    DDRC  = 0xFF;
    0080 EF8F      LDI	R24,0xFF
    0081 BB84      OUT	P14,R24
(0046)    PORTD = 0x04;
    0082 E084      LDI	R24,4
    0083 BB82      OUT	P12,R24
(0047)    DDRD  = 0xFA;
    0084 EF8A      LDI	R24,0xFA
    0085 BB81      OUT	P11,R24
(0048)    PORTE = 0x07;
    0086 E087      LDI	R24,7
    0087 B987      OUT	P07,R24
(0049)    DDRE  = 0x07;
    0088 B986      OUT	P06,R24
(0050) }
    0089 9508      RET
(0051) 
(0052) //Watchdog initialisation
(0053) // prescale: 2048K cycles
(0054) void watchdog_init(void)
(0055) {
(0056)  WDR(); //this prevents a timout on enabling
_watchdog_init:
    008A 95A8      WDR
(0057)  WDTCR= 0x0F; //WATCHDOG ENABLED - dont forget to issue WDRs
    008B E08F      LDI	R24,0xF
    008C BD81      OUT	P21,R24
(0058) }
    008D 9508      RET
(0059) 
(0060) //TIMER1 initialisation - prescale:256
(0061) // WGM: 0) Normal, TOP=0xFFFF
(0062) // desired value: 50Hz
(0063) // actual value: 50.000Hz (0.0%)
(0064) void timer1_init(void)
(0065) {
(0066)  TCCR1B= 0x00; //stop
_timer1_init:
    008E 2422      CLR	R2
    008F BC2E      OUT	P2E,R2
(0067)  TCNT1H= 0xFB; //setup
    0090 EF8B      LDI	R24,0xFB
    0091 BD8D      OUT	P2D,R24
(0068)  TCNT1L= 0x1E;
    0092 E18E      LDI	R24,0x1E
    0093 BD8C      OUT	P2C,R24
(0069)  OCR1AH= 0x04;
    0094 E084      LDI	R24,4
    0095 BD8B      OUT	P2B,R24
(0070)  OCR1AL= 0xE2;
    0096 EE82      LDI	R24,0xE2
    0097 BD8A      OUT	P2A,R24
(0071)  OCR1BH= 0x04;
    0098 E084      LDI	R24,4
    0099 BD89      OUT	P29,R24
(0072)  OCR1BL= 0xE2;
    009A EE82      LDI	R24,0xE2
    009B BD88      OUT	P28,R24
(0073)  TCCR1A= 0x00;
    009C BC2F      OUT	P2F,R2
(0074)  TCCR1B= 0x04; //start Timer
    009D E084      LDI	R24,4
    009E BD8E      OUT	P2E,R24
(0075) }
    009F 9508      RET
_timer1_ovf_isr:
    00A0 922A      ST	R2,-Y
    00A1 923A      ST	R3,-Y
    00A2 938A      ST	R24,-Y
    00A3 939A      ST	R25,-Y
    00A4 93EA      ST	R30,-Y
    00A5 B62F      IN	R2,P3F
    00A6 922A      ST	R2,-Y
(0076) 
(0077) #pragma interrupt_handler timer1_ovf_isr:16
(0078) void timer1_ovf_isr(void)
(0079) {
(0080)  //TIMER1 has overflowed 
(0081)  TCNT1H= 0xFB; //reload counter high value
    00A7 EF8B      LDI	R24,0xFB
    00A8 BD8D      OUT	P2D,R24
(0082)  TCNT1L= 0x1E; //reload counter low value
    00A9 E18E      LDI	R24,0x1E
    00AA BD8C      OUT	P2C,R24
(0083)  timer_ok = 1;
    00AB E081      LDI	R24,1
    00AC 9380007E  STS	R24,_timer_ok
(0084)  count++;
    00AE 9180007A  LDS	R24,__idata_end
    00B0 9190007B  LDS	R25,__idata_end+1
    00B2 9601      ADIW	R24,1
    00B3 9390007B  STS	R25,__idata_end+1
    00B5 9380007A  STS	R24,__idata_end
(0085)  if(count == 30)
    00B7 318E      CPI	R24,0x1E
    00B8 E0E0      LDI	R30,0
    00B9 079E      CPC	R25,R30
    00BA F451      BNE	0x00C5
(0086)  {
(0087)     count = 0;
    00BB 2422      CLR	R2
    00BC 2433      CLR	R3
    00BD 9230007B  STS	R3,__idata_end+1
    00BF 9220007A  STS	R2,__idata_end
(0088)     PORTD ^= (1<<PD4); //程序在运行
    00C1 E180      LDI	R24,0x10
    00C2 B222      IN	R2,P12
    00C3 2628      EOR	R2,R24
    00C4 BA22      OUT	P12,R2
(0089)  }
(0090) 
(0091) }
    00C5 9029      LD	R2,Y+
    00C6 BE2F      OUT	P3F,R2
    00C7 91E9      LD	R30,Y+
    00C8 9199      LD	R25,Y+
    00C9 9189      LD	R24,Y+
    00CA 9039      LD	R3,Y+
    00CB 9029      LD	R2,Y+
    00CC 9518      RETI
_int0_isr:
  can_status           --> R22
  reg                  --> R20
  CompCount            --> R22
    00CD 940E0469  CALL	push_lset
    00CF 940E04AE  CALL	push_gset2
(0092) /*
(0093) //TIMER0 initialisation - prescale:256
(0094) // WGM: Normal
(0095) // desired value: 1000Hz
(0096) // actual value: 1008.065Hz (0.8%)
(0097) void timer0_init(void)
(0098) {
(0099)  TCCR0= 0x00; //stop
(0100)  TCNT0= 0xFE; //set count
(0101)  OCR0= 0x3E; //set compare value
(0102)  TCCR0= 0x04; //start timer
(0103)  TIMSK = 0x02;
(0104) }
(0105) 
(0106) #pragma interrupt_handler timer0_ovf_isr:18
(0107) void timer0_ovf_isr(void)
(0108) {
(0109)  TCNT0= 0xFE; //reload counter value
(0110)  timer_ok = 1;
(0111)  count++;
(0112)  if(count == 1)
(0113)  {
(0114)     count = 0;
(0115)     PORTD ^= (1<<PD4); //程序在运行
(0116)  }
(0117) }*/
(0118) 
(0119) #pragma interrupt_handler int0_isr:2
(0120) //中断处理可以考虑放外边
(0121) void int0_isr(void)
(0122) {
(0123)    unsigned char reg;
(0124)    unsigned char CompCount;
(0125)    unsigned char can_status;
(0126)    CLI();						 //关CPU中断
    00D1 94F8      BCLR	7
(0127)    RevFlag = 1;
    00D2 E081      LDI	R24,1
    00D3 9380007C  STS	R24,_RevFlag
(0128)    reg = read_sja(IER);				 //保存SJA1000的中断允许状态
    00D5 E004      LDI	R16,4
    00D6 940E0142  CALL	_read_sja
    00D8 2F40      MOV	R20,R16
(0129)    write_sja(IER, 0x00);			 //重设中断允许状态为不允许任何中断
    00D9 2722      CLR	R18
    00DA E004      LDI	R16,4
    00DB 940E014F  CALL	_write_sja
(0130)    can_status = CanReceive();		 //接收消息
    00DD 940E0411  CALL	_CanReceive
    00DF 2F60      MOV	R22,R16
(0131)    if(can_status == 0x01)
    00E0 3001      CPI	R16,1
    00E1 F4C9      BNE	0x00FB
(0132)    {
(0133) 	  for(CompCount = 5; CompCount < 13; CompCount++)				//检查接收到的数据是否正确
    00E2 E065      LDI	R22,5
    00E3 C014      RJMP	0x00F8
(0134) 	  {
(0135) 	     if(RX_Buffer[CompCount] != TX_Buffer[CompCount])
    00E4 E88C      LDI	R24,0x8C
    00E5 E090      LDI	R25,0
    00E6 2FE6      MOV	R30,R22
    00E7 27FF      CLR	R31
    00E8 0FE8      ADD	R30,R24
    00E9 1FF9      ADC	R31,R25
    00EA 8020      LDD	R2,0+Z
    00EB E78F      LDI	R24,0x7F
    00EC E090      LDI	R25,0
    00ED 2FE6      MOV	R30,R22
    00EE 27FF      CLR	R31
    00EF 0FE8      ADD	R30,R24
    00F0 1FF9      ADC	R31,R25
    00F1 8030      LDD	R3,0+Z
    00F2 1432      CP	R3,R2
    00F3 F019      BEQ	0x00F7
(0136)          {
(0137) 		    RevFlag = 0;	   						  	//发现有不一致时，则清0标志位 
    00F4 2422      CLR	R2
    00F5 9220007C  STS	R2,_RevFlag
    00F7 9563      INC	R22
    00F8 306D      CPI	R22,0xD
    00F9 F350      BCS	0x00E4
(0138) 	     } 
(0139)       } 
(0140)    }
    00FA C002      RJMP	0x00FD
(0141)    else
(0142)    Init_CAN();		 	 	 	 //如果不是正确接收，则重新初始化
    00FB 940E02F6  CALL	_Init_CAN
(0143)    write_sja(IER, reg);			 //重新写回中断允许模式
    00FD 2F24      MOV	R18,R20
    00FE E004      LDI	R16,4
    00FF 940E014F  CALL	_write_sja
(0144)    SEI();
    0101 9478      BSET	7
(0145) }     
    0102 940E04BE  CALL	pop_gset2
    0104 940E0480  CALL	pop_lset
    0106 9518      RETI
(0146) 
(0147) // **Section [PCHINT1] not found**
(0148) //call this routine to initialise all peripherals
(0149) void init_devices(void)
(0150) {
(0151)  //stop errant interrupts until set up
(0152)  CLI(); //disable all interrupts
_init_devices:
    0107 94F8      BCLR	7
(0153)  port_init();
    0108 DF6E      RCALL	_port_init
(0154)  watchdog_init();
    0109 DF80      RCALL	_watchdog_init
(0155)  //timer1_init();
(0156) 
(0157)  MCUCR = 0x82; 
    010A E882      LDI	R24,0x82
    010B BF85      OUT	P35,R24
(0158)  EMCUCR = 0x00;
    010C 2422      CLR	R2
    010D BE26      OUT	P36,R2
(0159)  //GIMSK= 0x00;
(0160)  TIMSK = 0x80; //timer interrupt sources
    010E E880      LDI	R24,0x80
    010F BF89      OUT	P39,R24
(0161)  //ETIMSK = 0x00;
(0162)  GICR = 0x40;
    0110 E480      LDI	R24,0x40
    0111 BF8B      OUT	P3B,R24
(0163)  //PCMSK0 = 0x00;
(0164)  //PCMSK1 = 0x00;
(0165)  SEI(); //re-enable interrupts
    0112 9478      BSET	7
(0166)  //all peripherals are now initialised
(0167) }
    0113 9508      RET
(0168) 
(0169) void main(void)
(0170) {  
(0171)    init_devices();
_main:
    0114 DFF2      RCALL	_init_devices
(0172)    WDR();
    0115 95A8      WDR
(0173)    
(0174)    //Delay(1000);
(0175)    
(0176)    Init_CAN();			     //CAN初始化	
    0116 940E02F6  CALL	_Init_CAN
(0177)    WDR();
    0118 95A8      WDR
(0178)    timer1_init();
    0119 DF74      RCALL	_timer1_init
(0179)    WDR();
    011A 95A8      WDR
    011B C024      RJMP	0x0140
(0180)    
(0181)    while(1)
(0182)    {
(0183) 	  PORTD |= (1<<PD1);//初始化成功
    011C 9A91      SBI	P12,1
(0184) 	  WDR();
    011D 95A8      WDR
(0185) 	  if(timer_ok == 1)
    011E 9180007E  LDS	R24,_timer_ok
    0120 3081      CPI	R24,1
    0121 F491      BNE	0x0134
(0186) 	  {
(0187) 	     timer_ok = 0;
    0122 2422      CLR	R2
    0123 9220007E  STS	R2,_timer_ok
(0188) 		 timer_count++;
    0125 9180007D  LDS	R24,_timer_count
    0127 5F8F      SUBI	R24,0xFF
    0128 9380007D  STS	R24,_timer_count
(0189) 		 
(0190) 		 if(timer_count == 60)
    012A 338C      CPI	R24,0x3C
    012B F441      BNE	0x0134
(0191) 		 {
(0192) 		    timer_count = 0;
    012C 9220007D  STS	R2,_timer_count
(0193) 			//TCCR1B = 0x00;
(0194) 			CanTransmit(); 	 //发送数据
    012E 940E03AB  CALL	_CanTransmit
(0195) 		    PORTD ^= (1<<PD3);
    0130 E088      LDI	R24,0x8
    0131 B222      IN	R2,P12
    0132 2628      EOR	R2,R24
    0133 BA22      OUT	P12,R2
(0196) 			//TCCR1B = 0x04;
(0197) 		 }
(0198) 		 
(0199) 	  }
(0200) 	  //Delay(50);
(0201) 	  //Delay(100);
(0202) 	  WDR();  
    0134 95A8      WDR
(0203) 	  if(RevFlag == 1)		 //如果正确接收到数据
    0135 9180007C  LDS	R24,_RevFlag
    0137 3081      CPI	R24,1
    0138 F439      BNE	0x0140
(0204) 	  {
(0205) 	     RevFlag = 0;
    0139 2422      CLR	R2
    013A 9220007C  STS	R2,_RevFlag
(0206) 		 PORTD ^= (1<<PD5); 
    013C E280      LDI	R24,0x20
    013D B222      IN	R2,P12
    013E 2628      EOR	R2,R24
    013F BA22      OUT	P12,R2
    0140 CFDB      RJMP	0x011C
(0207) 		 //write_sja(CMR, 0x04);	
(0208) 	  }
(0209) 	  
(0210)    }
(0211) }
    0141 9508      RET
_read_sja:
  sja_address          --> R20
  addr                 --> R16
    0142 940E0497  CALL	push_gset1
FILE: D:\candesignnow\can_module.c
(0001) #include "can.h"
(0002) #include "macros.h"
(0003) extern unsigned char TX_Buffer[13];
(0004) extern unsigned char RX_Buffer[13];
(0005) /*struct {
(0006)       uchar F_Fmt;
(0007) 	  uchar ID[4];
(0008) 	  uchar Data[8];
(0009) }SJAFrameStruct,  *P_SJAFrameStruct ;*/
(0010) 
(0011) //SJAFrameStruct TX_Buffer;
(0012) //unsigned char RX_Buffer[13];
(0013) //unsigned char TX_Buffer[13];
(0014) 
(0015) unsigned char read_sja(unsigned char addr) 				   //读SJA1000状态寄存器子程序
(0016) {
(0017)     unsigned char *sja_address = (unsigned char *)startadd;
    0144 E040      LDI	R20,0
    0145 E75F      LDI	R21,0x7F
(0018) 	sja_address = (unsigned char *)startadd;
(0019) 	sja_address = sja_address + addr;
    0146 2E20      MOV	R2,R16
    0147 2433      CLR	R3
    0148 0D42      ADD	R20,R2
    0149 1D53      ADC	R21,R3
(0020) 	return (*(sja_address));
    014A 01FA      MOVW	R30,R20
    014B 8100      LDD	R16,0+Z