baud.vhd

来自「串口驱动以及串口调试的源代码」· VHDL 代码 · 共 27 行

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
 
entity baud is
    Port (clk,resetb:in std_logic;
          bclk:out std_logic);
end baud;
 
architecture behavioral of baud is
begin

process(clk,resetb)
variable cnt:integer;
begin
  if resetb='1' then                                         -- resetb='1'时复位
     cnt:=0; bclk<='0';
  elsif rising_edge(clk) then
     if cnt>=325 then cnt:=0; bclk<='1';                     --设置分频系数
         else cnt:=cnt+1; bclk<='0';
         end if;
  end if;
end process;
end behavioral;