des.txt

本人从老师那里找到的3DES的算法的源代码

module DES(sysclk,en,reset,mode,load,key,datain,dataout,ready,flag);
input[64:1] key,datain;
input sysclk,en,reset,mode,load;
output ready,flag;
output[64:1] dataout;
reg[64:1] dataout;
reg[64:1] wire0,wire1,wire2,wire3,wire4,wire5,wire6,wire7,wire8,wire9,wire10,wire11,wire12,wire13,wire14,wire15,wire16;
wire[64:1] wire17;
wire[48:1] k1,k2,k3,k4,k5,k6,k7,k8,k9,k10,k11,k12,k13,k14,k15,k16;
wire en1,en2,en3,en4,en5,en6,en7,en8,en9,en10,en11,en12,en13,en14,en15,en16,ready1,flag;
reg ready;
assign flag=en16;
ip c1(datain,wire0);
control ct(sysclk,reset,en,load,ready1,en1,en2,en3,en4,en5,en6,en7,en8,en9,en10,en11,en12,en13,en14,en15,en16);
creatkey(sysclk,reset,en,mode,k1,k2,k3,k4,k5,k6,k7,k8,k9,k10,k11,k12,k13,k14,k15,k16);
lun lun1(sysclk,reset,en1,wire0,k1,wire1);
lun lun2(sysclk,reset,en2,wire1,k2,wire2);
lun lun3(sysclk,reset,en3,wire2,k3,wire3);
lun lun4(sysclk,reset,en4,wire3,k4,wire4);
lun lun5(sysclk,reset,en5,wire4,k5,wire5);
lun lun6(sysclk,reset,en6,wire5,k6,wire6);
lun lun7(sysclk,reset,en7,wire6,k7,wire7);
lun lun8(sysclk,reset,en8,wire7,k8,wire8);
lun lun9(sysclk,reset,en9,wire8,k9,wire9);
lun lun10(sysclk,reset,en10,wire9,k10,wire10);
lun lun11(sysclk,reset,en11,wire10,k11,wire11);
lun lun12(sysclk,reset,en12,wire11,k12,wire12);
lun lun13(sysclk,reset,en13,wire12,k13,wire13);
lun lun14(sysclk,reset,en14,wire13,k14,wire14);
lun lun15(sysclk,reset,en15,wire14,k15,wire15);
lun lun16(sysclk,reset,en16,wire15,k16,wire16);
ip1 c2(wire16,wire17);
always@(posedge sysclk or posedge reset)
 begin
  if(reset)
     begin
     dataout<=64'd0;
     ready<=1'b0;
     end
  else if(ready1)
     begin
      dataout<=wire17;
      ready<=1'b1;
     end
  end
endmodule