lcm_q921.c

abstract rtos

#ifdef __cplusplus
extern "C"{
#endif 


#include "syscfg.h"
#include "aos.h"
#include "p2p_include.h"
#if( CONFIG_BOARD_GMPU == TRUE )                
#include "v5_pub.h"
#endif
#include "trace/trace_pub.h"


#include "../ker/ssp_msg.h"


#include "lcm_q921.h"
#include "lcm_if.h"


L2_LINK_S *m_links[LCM_DRV_BUTT]={0,};
struct msg_blk_que lcm_phy_que;
U32 lcm_rcv_task_id = U32_BUTT;
U32 processor_id_base = 0;
U32 dbg_drvtype,dbg_dltype;
U16 dev_dl_ef_addr  = U16_BUTT;

#if( CONFIG_BOARD_GMPU == TRUE  )

U32 phy_port_num[LCM_DRV_BUTT] = 
    { MAX_COMMPORT_NUM,          
      0,                         
      0,                         
      0,                         
      50                         
    };

#elif( CONFIG_BOARD_GDSP == TRUE )

U32 phy_port_num[LCM_DRV_BUTT] = 
    { 0,          
      MAX_CARD_NUM-MAX_DEV_EIA_NUM,  
      0,          
      0,          
      0           
    };


#elif( CONFIG_BOARD_EIA == TRUE )

U32 phy_port_num[LCM_DRV_BUTT] = 
    { 0,  
      0,  
      1,  
      1,  
      0,        
    };

#endif


U32 link_per_port[LCM_DRV_BUTT] = 
{ V5DL_ID_PROT2, 
  1,             
  1,             
  1,             
  1              
};


S8* timer_string[LCM_TIMER_BUTT]=
{
    "t200",
    "t203"
};

#define TIMER_STRING(name) ((name)<LCM_TIMER_BUTT?timer_string[name]:"UnknownTimer")

S8 *phy_string[LCM_DRV_BUTT]  = 
{
    "hdlc",
    "ethernet",
    "udp4eia",
    "serial",
    "siptrunk"
};

LCM_DRV_S lcm_phy_drv[LCM_DRV_BUTT] = 
{
    
    {FALSE,{(VOID_FUNC_PTR)lcm_default_drv},N201+I_FRAME_LEN,N200,T200_LEN,T203_LEN},
    {FALSE,{(VOID_FUNC_PTR)lcm_default_drv},N201+I_FRAME_LEN,N200,T200_LEN,T203_LEN},
    {FALSE,{(VOID_FUNC_PTR)lcm_default_drv},N201+I_FRAME_LEN,N200,T200_LEN,T203_LEN},
    {FALSE,{(VOID_FUNC_PTR)lcm_default_drv},N201+I_FRAME_LEN,N200,T200_LEN,T203_LEN},
    {FALSE,{(VOID_FUNC_PTR)lcm_default_drv},N201+I_FRAME_LEN,N200,T200_LEN,T203_LEN} 
    
};

S8 *prim_string[LCM_PRIM_BUTT]  = 
{
    "DL_UNIT_DATA_REQUEST",
    "DL_UNIT_DATA_INDICATION",
    "DL_DATA_REQUEST",
    "DL_DATA_INDICATION",
    "MDL_ESTABLISH_REQUEST",
    "MDL_ESTABLISH_INDICATION",
    "MDL_ESTABLISH_CONFIRM",
    "MDL_RELEASE_REQUEST",
    "MDL_RELEASE_INDICATION",
    "MDL_RELEASE_CONFIRM",
    "MDL_ERROR_INDICATION",
    "MDL_L1_FAIL_INDICATION",
};

S8 *dl_string[V5DL_ID_BUTT]=
{
    "V5DL_ID_PSTN",                    
    "V5DL_ID_BCC",                     
    "V5DL_ID_CTRL",                    
    "V5DL_ID_LCTRL",                   
    "V5DL_ID_PROT1",                   
    "V5DL_ID_PROT2",                   
    "V5DL_ID_ISDN",                    
    "V5DL_ID_DEV_MNGT"                 
};


S8 *status_string[LINK_STATUS_BUTT]=
{
    "not used",
    "not used",
    "not used",
    "not used",
    "not used",

    "AWAITING_ESTABLISHMENT",
    "AWAITING_RELEASE",
    "MULTIPLE_FRAME_ESTABLISHED",
    "TIMER_RECOVERY",
    "LINK_NOT_ESTABLISHED"
    
};

Q921FSM q921_fsm[LINK_STATUS_BUTT]=
{
    NULL,
    NULL,
    NULL,
    NULL,
    NULL,

    on_awaiting_estblishment,
    on_awaiting_release,
    on_multi_frame_estblished,
    on_timer_recovery,
    on_link_not_established
};

U8 g_ucPriTei = PRI_TEI;

#if(CONFIG_BOARD_EIA == TRUE && CONFIG_OS_VXWORKS == TRUE)        
extern VOID phy_console_recv_from_lcm( S8 *msg, U32 len );
#endif
extern VOID load_convert_processorid( VOID *pMsg );





U32  lcm_init_proc( START_ORDER_E order )
{
    U8 phy;
    U32 linkno, result;
#if( CONFIG_BOARD_GMPU == TRUE )
    U32 slot, left_mpu_processor_id = U32_BUTT;

    slot = dev_get_local_slot();
#endif

    switch( order )
    {
        case STARTUP_INITIAL:       

#if( CONFIG_BOARD_GMPU == TRUE )
            phy_port_num[LCM_DRV_ETH]     = MAX_CARD_NUM-MAX_DEV_EIA_NUM;
            phy_port_num[LCM_DRV_UDP4EIA] = MAX_DEV_EIA_NUM;
#endif
            dbg_drvtype = 0;
            dbg_dltype  = 0;

            dev_dl_ef_addr = lcm_get_dev_ef_addr();
            
            for( phy=LCM_DRV_HDLC; phy<LCM_DRV_BUTT; phy++ )
            {
                if( !phy_port_num[phy] )
                {
                    m_links[phy] = NULL;
                    continue;
                }
                
                m_links[phy] = (L2_LINK_S*)aos_smem_alloc( MPE_LCM, phy, 
                              sizeof(L2_LINK_S)*phy_port_num[phy]*link_per_port[phy] );
                if( NULL == m_links[phy] )
                {
                    return AOS_FAIL;
                }
            }
            
            for( phy=LCM_DRV_HDLC; phy<LCM_DRV_BUTT; phy++ )
            {
                LCM_PHY_RCV rcv;
                lcm_add_drv( phy, N201+I_FRAME_LEN, lcm_default_drv, &rcv );
                lcm_set_link_paras( phy, N200, T200_LEN, T203_LEN );
            }

            msg_lock_que_init( &lcm_phy_que );

            result = aos_task_create( "lcmrcvt", 
                                      CONFIG_MSG_TASK_STACK_SIZE, 
                                      TASK_PRIO_HIGHEST,
                                      AOS_TASK_NOPREEMPT,
                                      (VOID(*)(VOID*))lcm_recv_task,
                                      (VOID*)NULL,
                                      &lcm_rcv_task_id);
            if( AOS_SUCC != result )
            {
                return result;
            }

            break;
            
        case STARTUP_LOAD_DATA:  
            break;
            
        case STARTUP_GO: 
            
            dev_get_processorid_by_slot_subc( 0, 0, &processor_id_base );
#if( CONFIG_BOARD_GMPU == TRUE )
            dev_get_processorid_by_slot_subc( LEFT_MPU_CARD_SLOT, 0, 
                                              &left_mpu_processor_id );
#endif
            for( phy=LCM_DRV_HDLC; phy<LCM_DRV_BUTT; phy++ )    
            {
                for( linkno=0; linkno < phy_port_num[phy]*link_per_port[phy]; linkno++ )
                {
                    L2_LINK_S *linkp = &m_links[phy][linkno];
                    linkp->status    = LINK_NOT_ESTABLISHED;

                    if( LCM_DRV_HDLC == phy )
                    {
                        linkp->link_type = (U8)(linkno%link_per_port[phy]);
                    }
                    else
                    {
                        linkp->link_type = V5DL_ID_DEV_MNGT;
                    }

                    linkp->phy_type  = phy;

                    if( LCM_DRV_ETH == phy )
                    {
                        linkp->phy_port_no = 
                            linkno/link_per_port[phy] + processor_id_base;
                    }
                    else
                    {
                        linkp->phy_port_no = linkno/link_per_port[phy];                        
                    }

                    linkp->error_code = 0;
                    
                    
                    linkp->k         = DEFAULT_CCITT_K;
                    linkp->n200      = (U8)lcm_phy_drv[phy].n200;
                    linkp->n201      = lcm_phy_drv[phy].mtu - I_FRAME_LEN;
                    linkp->t200_len  = lcm_phy_drv[phy].t200_len;
                    linkp->t203_len  = lcm_phy_drv[phy].t203_len;


                    FILL_EF_ADDR( linkp->ef_addr, LINK_EF_ADDR(linkp->link_type) );


#if( CONDIF_BIG_ENDIAN == TRUE )
                    linkp->sapi      = (linkp->ef_addr&0xfc00)>>10;
                    linkp->tei       = (linkp->ef_addr&0xfe)>>1;
#else
                    linkp->sapi      = (linkp->ef_addr&0xfc)>>2;
                    linkp->tei       = (linkp->ef_addr&0xfe00)>>9;
#endif
                    linkp->v_s       = 0;
                    linkp->v_a       = 0;
                    linkp->v_r       = 0;            
                    linkp->rc        = 0;

                    if( LCM_DRV_HDLC == phy )
                    {
#ifdef CONFIG_SIMULATE_LE
                        linkp->peer_cmd  = USER_CMD;
                        linkp->own_cmd   = NET_CMD;
                        linkp->own_resp  = NET_ACK;            
#else
                        linkp->peer_cmd  = NET_CMD;
                        linkp->own_cmd   = USER_CMD;
                        linkp->own_resp  = USER_ACK;            
#endif
                    }
                    else
                    {
#if CONFIG_BOARD_GMPU == TRUE
                        
                        if( LCM_DRV_ETH == phy )
                        {
                            if( (RIGHT_MPU_CARD_SLOT == slot) && 
                                (left_mpu_processor_id == linkp->phy_port_no) )
                            {
                                linkp->peer_cmd  = NET_CMD;
                                linkp->own_cmd   = USER_CMD;
                                linkp->own_resp  = USER_ACK;
                            }
                            else
                            {
                                linkp->peer_cmd  = USER_CMD;
                                linkp->own_cmd   = NET_CMD;
                                linkp->own_resp  = NET_ACK;
                            }
                        }
                        else if( LCM_DRV_UDP4SIPTRUNK == phy )
                        {
                            linkp->peer_cmd  = NET_CMD;
                            linkp->own_cmd   = NET_CMD;
                            linkp->own_resp  = NET_ACK;
                        }
                        else
                        {
                            linkp->peer_cmd  = USER_CMD;
                            linkp->own_cmd   = NET_CMD;
                            linkp->own_resp  = NET_ACK;
                        }
#else
                        linkp->peer_cmd  = NET_CMD;
                        linkp->own_cmd   = USER_CMD;
                        linkp->own_resp  = USER_ACK;
#endif
                    }

                    linkp->peer_rcv_busy  = 0;
                    linkp->own_rcv_busy   = 0;
                    linkp->ack_pending    = 0;
                    linkp->rej_exception  = 0;
                    linkp->own_l3_init    = 0;        
                    linkp->is_for_dss1    = 0; 
                    if( LCM_DRV_UDP4SIPTRUNK == phy )
                    {
                        linkp->is_for_siptrunk = 1;
                    }
                    else
                    {
                        linkp->is_for_siptrunk = 0;
                    }
                    linkp->pading2        = 0;

                    linkp->t200           = NULL;                    
                    linkp->t203           = NULL;     

                    msg_que_init( &linkp->i_frame_q );
                    linkp->discard_pkt    = 0;
                    linkp->print_flag     = 0;
                }
            }

#ifdef CONFIG_SIMULATE_E1
            {
                result = lcm_hdlc_sim_init();
                if( AOS_SUCC != result )
                {
                    return result;
                }
            }
#endif

#if( CONFIG_BOARD_EIA == TRUE )
            result = lcm_com_init( );
            if( AOS_SUCC != result )
            {
                return result;
            }
#endif
             break;


        default:
            break;
    }

    return AOS_SUCC;
}

VOID lcm_msg_proc( MSG_S *msg, VOID*pvMsgBuf )
{
    AOS_ASSERT( NULL != msg && NULL != pvMsgBuf );

    if( NULL == msg || NULL == pvMsgBuf )
    {
        return;
    }

    if( MPE_LCM != msg->dstMpe || LOCAL_PROCESSOR_ID != msg->dstProcessorId )
    {
        return;
    }

    if( (MPE_V5MNGT == msg->srcMpe) ||
        (MPE_V5PSTN == msg->srcMpe) ||
        (MPE_V5CTRL == msg->srcMpe) ||
        (MPE_V5BCC == msg->srcMpe) ||
        (MPE_V5LINKC == msg->srcMpe) ||
        (MPE_V5PROT == msg->srcMpe) ||
        (MPE_DEV == msg->srcMpe) ||
        (MPE_Q931 == msg->srcMpe) ||
        (MPE_FAXD == msg->srcMpe) )
    {
        q921_mngt_handle( msg->srcMpe,(DL_MSG_S*)pvMsgBuf );
    }
    else if( MPE_TIMER == msg->srcMpe )
    {
        q921_timeout_handle( ((TIMER_MSG_S*)pvMsgBuf)->ulTimerName,(L2_LINK_S*)((TIMER_MSG_S*)pvMsgBuf)->ulPara );
    }
    else if( MPE_LCM == msg->srcMpe )
    {
        if( LOCAL_PROCESSOR_ID == msg->srcProcessorId )
        {
            q921_self_handle( msg );
        }
        else
        {
            lcm_test_proc( (LCM_EFFICIENT_MSG_S *)msg->pvMsgBuf, msg->srcProcessorId );
        }
    }
    else if( MPE_DEBUG == msg->srcMpe )
    {
        lcm_debug_proc( (DEBUG_MSG_S*)pvMsgBuf );
    }
    else
    {
        aos_printf( MPE_LCM, "q921<-:Unknown message, src mpe=%d", msg->srcMpe );
    }
        
}

VOID q921_phy_data_ind( U32 phy_type, U32 port_no, struct msg_blk* mb )
{
    Q921_FRAME_S *framep;
    L2_LINK_S *linkp;
    U32 cmd;
    U32 link_type;
        
    if( NULL == mb )
    {
        aos_printf( MPE_LCM, "q921<-:q921_phy_data_ind,null mb" );
        return;
    }

    if( phy_type >= LCM_DRV_BUTT )
    {
        aos_printf( MPE_LCM, "q921<-:q921_phy_data_ind, phy_type=%d error", phy_type );
        return;
    }

    if( port_no >= phy_port_num[phy_type] )
    {
        aos_printf( MPE_LCM, "q921<-:q921_phy_data_ind, port_no error", port_no );
        return;
    }

    if( ( LCM_DRV_HDLC == phy_type )
     && ( TRUE == dev_is_comport_for_q931(port_no) ) )
    {
        
        framep = (Q921_FRAME_S*)msg_push( mb,sizeof(U16) );
        framep->ef_addr = 0;
    }
    else
    {
        framep = (Q921_FRAME_S*)mb->data;
    }

    if( LCM_DRV_HDLC == phy_type && TRUE == dev_is_comport_for_q931( port_no) )
    {
        if( SAPI_63 == framep->frm.u_frame.sapi