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📄 mscuser.lst

📁 开发ARM,基于IAR环境下的C代码开发
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 00000036  4800      LDR         R3,=Offset ; Offset
 00000038  681B      LDR         R3,[R3,#0x0] ; Offset
 0000003A  189B      ADD         R3,R2 ; n
 0000003C  4800      LDR         R2,=Memory ; Memory
 0000003E  54D1      STRB        R1,[R2,R3]
  132:   }
 00000040  3001      ADD         R0,#0x1
 00000042          L_11:
 00000042  4800      LDR         R1,=BulkLen ; BulkLen
 00000044  7809      LDRB        R1,[R1,#0x0] ; BulkLen
 00000046  1C0A      MOV         R2,R1
 00000048  1C01      MOV         R1,R0 ; n
 0000004A  4291      CMP         R1,R2 ; n
 0000004C  D3EF      BCC         L_12  ; T=0x0000002E
  134:   Offset += BulkLen;
 0000004E  4800      LDR         R0,=Offset ; Offset
 00000050  6801      LDR         R1,[R0,#0x0] ; Offset
 00000052  1889      ADD         R1,R2
 00000054  6001      STR         R1,[R0,#0x0] ; Offset
  135:   Length -= BulkLen;
 00000056  4800      LDR         R0,=Length ; Length
 00000058  6801      LDR         R1,[R0,#0x0] ; Length
 0000005A  1A89      SUB         R1,R2
 0000005C  6001      STR         R1,[R0,#0x0] ; Length
  137:   CSW.dDataResidue -= BulkLen;
 0000005E  4800      LDR         R0,=CSW + 0x8 ; CSW+8
 00000060  7801      LDRB        R1,[R0,#0x0] ; CSW+8
 00000062  7843      LDRB        R3,[R0,#0x1] ; CSW+8
 00000064  021B      LSL         R3,R3,#0x8
 00000066  4319      ORR         R1,R3
ARM COMPILER V2.53,  mscuser                                                               24/09/06  22:23:19  PAGE 15  

 00000068  7883      LDRB        R3,[R0,#0x2] ; CSW+8
 0000006A  041B      LSL         R3,R3,#0x10
 0000006C  4319      ORR         R1,R3
 0000006E  78C3      LDRB        R3,[R0,#0x3] ; CSW+8
 00000070  061B      LSL         R3,R3,#0x18
 00000072  4319      ORR         R1,R3
 00000074  1A89      SUB         R1,R2
 00000076  7001      STRB        R1,[R0,#0x0] ; CSW+8
 00000078  0A09      LSR         R1,R1,#0x8
 0000007A  7041      STRB        R1,[R0,#0x1] ; CSW+8
 0000007C  0A09      LSR         R1,R1,#0x8
 0000007E  7081      STRB        R1,[R0,#0x2] ; CSW+8
 00000080  0A09      LSR         R1,R1,#0x8
 00000082  70C1      STRB        R1,[R0,#0x3] ; CSW+8
  139:   if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
 00000084  4800      LDR         R0,=Length ; Length
 00000086  6800      LDR         R0,[R0,#0x0] ; Length
 00000088  2800      CMP         R0,#0x0
 0000008A  D003      BEQ         L_15  ; T=0x00000094
 0000008C  4800      LDR         R0,=BulkStage ; BulkStage
 0000008E  7800      LDRB        R0,[R0,#0x0] ; BulkStage
 00000090  2805      CMP         R0,#0x5
 00000092  D107      BNE         L_14  ; T=0x000000A4
 00000094          L_15:
  140:     AT91C_BASE_PIOA->PIO_SODR = LED2;  /* Turn Off Write LED */
 00000094  2102      MOV         R1,#0x2
 00000096  4800      LDR         R0,=0xFFFFF430
 00000098  6001      STR         R1,[R0,#0x0]
  141:     CSW.bStatus = CSW_CMD_PASSED;
 0000009A  2100      MOV         R1,#0x0
 0000009C  4800      LDR         R0,=CSW + 0xC ; CSW+12
 0000009E  7001      STRB        R1,[R0,#0x0] ; CSW+12
  142:     MSC_SetCSW();
 000000A0  F7FF      BL          MSC_SetCSW?T  ; T=0x0001  (1)
 000000A2  FFAE      BL          MSC_SetCSW?T  ; T=0x0001  (2)
  143:   }
 000000A4          L_14:
 000000A4            ; SCOPE-END
  144: }
 000000A4  BC08      POP         {R3}
 000000A6  4718      BX          R3
 000000A8          ENDP ; 'MSC_MemoryWrite?T'


*** CODE SEGMENT '?PR?MSC_MemoryVerify?T?mscuser':
  154: void MSC_MemoryVerify (void) {
 00000000  B500      PUSH        {LR}
 00000002            ; SCOPE-START
  157:   if ((Offset + BulkLen) > MSC_MemorySize) {
 00000002  4800      LDR         R0,=BulkLen ; BulkLen
 00000004  7800      LDRB        R0,[R0,#0x0] ; BulkLen
 00000006  1C02      MOV         R2,R0
 00000008  4800      LDR         R0,=Offset ; Offset
 0000000A  6800      LDR         R0,[R0,#0x0] ; Offset
 0000000C  1882      ADD         R2,R0,R2
 0000000E  4800      LDR         R1,=0x2000
 00000010  428A      CMP         R2,R1
 00000012  D90A      BLS         L_21  ; T=0x0000002A
  158:     BulkLen = MSC_MemorySize - Offset;
 00000014  1A09      SUB         R1,R0
 00000016  0609      LSL         R1,R1,#0x18
 00000018  0E09      LSR         R1,R1,#0x18
 0000001A  4800      LDR         R0,=BulkLen ; BulkLen
 0000001C  7001      STRB        R1,[R0,#0x0] ; BulkLen
  159:     BulkStage = MSC_BS_CSW;
 0000001E  2105      MOV         R1,#0x5
 00000020  4800      LDR         R0,=BulkStage ; BulkStage
 00000022  7001      STRB        R1,[R0,#0x0] ; BulkStage
ARM COMPILER V2.53,  mscuser                                                               24/09/06  22:23:19  PAGE 16  

  160:     USB_SetStallEP(MSC_EP_OUT);
 00000024  2002      MOV         R0,#0x2
 00000026  F7FF      BL          USB_SetStallEP?T  ; T=0x0001  (1)
 00000028  FFEB      BL          USB_SetStallEP?T  ; T=0x0001  (2)
  163:   for (n = 0; n < BulkLen; n++) {
 0000002A          L_21:
 0000002A  2000      MOV         R0,#0x0
 0000002C  ---- Variable 'n' assigned to Register 'R0' ----
 0000002C  E00F      B           L_19  ; T=0x0000004E
 0000002E          L_20:
  164:     if (Memory[Offset + n] != BulkBuf[n]) {
 0000002E  1C01      MOV         R1,R0 ; n
 00000030  4800      LDR         R2,=Offset ; Offset
 00000032  6812      LDR         R2,[R2,#0x0] ; Offset
 00000034  1852      ADD         R2,R1 ; n
 00000036  4800      LDR         R1,=Memory ; Memory
 00000038  5C89      LDRB        R1,[R1,R2]
 0000003A  1C03      MOV         R3,R0 ; n
 0000003C  4800      LDR         R2,=BulkBuf ; BulkBuf
 0000003E  5CD2      LDRB        R2,[R2,R3]
 00000040  4291      CMP         R1,R2
 00000042  D003      BEQ         L_17  ; T=0x0000004C
  165:       MemOK = FALSE;
 00000044  2200      MOV         R2,#0x0
 00000046  4800      LDR         R1,=MemOK ; MemOK
 00000048  600A      STR         R2,[R1,#0x0] ; MemOK
  166:       break;
 0000004A  E006      B           L_18  ; T=0x0000005A
  168:   }
 0000004C          L_17:
 0000004C  3001      ADD         R0,#0x1
 0000004E          L_19:
 0000004E  4800      LDR         R1,=BulkLen ; BulkLen
 00000050  7809      LDRB        R1,[R1,#0x0] ; BulkLen
 00000052  1C0A      MOV         R2,R1
 00000054  1C01      MOV         R1,R0 ; n
 00000056  4291      CMP         R1,R2 ; n
 00000058  D3E9      BCC         L_20  ; T=0x0000002E
 0000005A          L_18:
  170:   Offset += BulkLen;
 0000005A  4800      LDR         R0,=BulkLen ; BulkLen
 0000005C  7800      LDRB        R0,[R0,#0x0] ; BulkLen
 0000005E  1C02      MOV         R2,R0
 00000060  4800      LDR         R0,=Offset ; Offset
 00000062  6801      LDR         R1,[R0,#0x0] ; Offset
 00000064  1889      ADD         R1,R2
 00000066  6001      STR         R1,[R0,#0x0] ; Offset
  171:   Length -= BulkLen;
 00000068  4800      LDR         R0,=Length ; Length
 0000006A  6801      LDR         R1,[R0,#0x0] ; Length
 0000006C  1A89      SUB         R1,R2
 0000006E  6001      STR         R1,[R0,#0x0] ; Length
  173:   CSW.dDataResidue -= BulkLen;
 00000070  4800      LDR         R0,=CSW + 0x8 ; CSW+8
 00000072  7801      LDRB        R1,[R0,#0x0] ; CSW+8
 00000074  7843      LDRB        R3,[R0,#0x1] ; CSW+8
 00000076  021B      LSL         R3,R3,#0x8
 00000078  4319      ORR         R1,R3
 0000007A  7883      LDRB        R3,[R0,#0x2] ; CSW+8
 0000007C  041B      LSL         R3,R3,#0x10
 0000007E  4319      ORR         R1,R3
 00000080  78C3      LDRB        R3,[R0,#0x3] ; CSW+8
 00000082  061B      LSL         R3,R3,#0x18
 00000084  4319      ORR         R1,R3
 00000086  1A89      SUB         R1,R2
 00000088  7001      STRB        R1,[R0,#0x0] ; CSW+8
ARM COMPILER V2.53,  mscuser                                                               24/09/06  22:23:19  PAGE 17  

 0000008A  0A09      LSR         R1,R1,#0x8
 0000008C  7041      STRB        R1,[R0,#0x1] ; CSW+8
 0000008E  0A09      LSR         R1,R1,#0x8
 00000090  7081      STRB        R1,[R0,#0x2] ; CSW+8
 00000092  0A09      LSR         R1,R1,#0x8
 00000094  70C1      STRB        R1,[R0,#0x3] ; CSW+8
  175:   if ((Length == 0) || (BulkStage == MSC_BS_CSW)) {
 00000096  4800      LDR         R0,=Length ; Length
 00000098  6800      LDR         R0,[R0,#0x0] ; Length
 0000009A  2800      CMP         R0,#0x0
 0000009C  D003      BEQ         L_24  ; T=0x000000A6
 0000009E  4800      LDR         R0,=BulkStage ; BulkStage
 000000A0  7800      LDRB        R0,[R0,#0x0] ; BulkStage
 000000A2  2805      CMP         R0,#0x5
 000000A4  D10C      BNE         L_23  ; T=0x000000C0
 000000A6          L_24:
  176:     CSW.bStatus = (MemOK) ? CSW_CMD_PASSED : CSW_CMD_FAILED;
 000000A6  4800      LDR         R0,=MemOK ; MemOK
 000000A8  6800      LDR         R0,[R0,#0x0] ; MemOK
 000000AA  2800      CMP         R0,#0x0
 000000AC  D001      BEQ         L_25  ; T=0x000000B2
 000000AE  2100      MOV         R1,#0x0
 000000B0  E000      B           L_26  ; T=0x000000B4
 000000B2          L_25:
 000000B2  2101      MOV         R1,#0x1
 000000B4          L_26:
 000000B4  0609      LSL         R1,R1,#0x18
 000000B6  0E09      LSR         R1,R1,#0x18
 000000B8  4800      LDR         R0,=CSW + 0xC ; CSW+12
 000000BA  7001      STRB        R1,[R0,#0x0] ; CSW+12
  177:     MSC_SetCSW();
 000000BC  F7FF      BL          MSC_SetCSW?T  ; T=0x0001  (1)
 000000BE  FFA0      BL          MSC_SetCSW?T  ; T=0x0001  (2)
  178:   }
 000000C0          L_23:
 000000C0            ; SCOPE-END
  179: }
 000000C0  BC08      POP         {R3}
 000000C2  4718      BX          R3
 000000C4          ENDP ; 'MSC_MemoryVerify?T'


*** CODE SEGMENT '?PR?MSC_RWSetup?T?mscuser':
  188: BOOL MSC_RWSetup (void) {
 00000000  B500      PUSH        {LR}
 00000002            ; SCOPE-START
  192:   n = (CBW.CB[2] << 24) |
 00000002  4800      LDR         R0,=CBW + 0x12 ; CBW+18
 00000004  7800      LDRB        R0,[R0,#0x0] ; CBW+18
 00000006  1C01      MOV         R1,R0
 00000008  0409      LSL         R1,R1,#0x10
 0000000A  4800      LDR         R0,=CBW + 0x11 ; CBW+17
 0000000C  7800      LDRB        R0,[R0,#0x0] ; CBW+17
 0000000E  0600      LSL         R0,R0,#0x18
 00000010  4308      ORR         R0,R1
 00000012  4800      LDR         R1,=CBW + 0x13 ; CBW+19
 00000014  7809      LDRB        R1,[R1,#0x0] ; CBW+19
 00000016  0209      LSL         R1,R1,#0x8
 00000018  4308      ORR         R0,R1
 0000001A  4800      LDR         R1,=CBW + 0x14 ; CBW+20
 0000001C  7809      LDRB        R1,[R1,#0x0] ; CBW+20
 0000001E  4308      ORR         R0,R1
 00000020  ---- Variable 'n' assigned to Register 'R0' ----
  197:   Offset = n * MSC_BlockSize;
 00000020  1C01      MOV         R1,R0 ; n
 00000022  0249      LSL         R1,R1,#0x9 ; n
 00000024  4800      LDR         R0,=Offset ; Offset
 00000026  6001      STR         R1,[R0,#0x0] ; Offset
ARM COMPILER V2.53,  mscuser                                                               24/09/06  22:23:19  PAGE 18  

  200:   n = (CBW.CB[7] <<  8) |
 00000028  4800      LDR         R0,=CBW + 0x17 ; CBW+23
 0000002A  7800      LDRB        R0,[R0,#0x0] ; CBW+23
 0000002C  1C01      MOV         R1,R0
 0000002E  4800      LDR         R0,=CBW + 0x16 ; CBW+22
 00000030  7800      LDRB        R0,[R0,#0x0] ; CBW+22
 00000032  0200      LSL         R0,R0,#0x8
 00000034  4308      ORR         R0,R1
  203:   Length = n * MSC_BlockSize;
 00000036  1C01      MOV         R1,R0 ; n
 00000038  0249      LSL         R1,R1,#0x9 ; n
 0000003A  4800      LDR         R0,=Length ; Length
 0000003C  6001      STR         R1,[R0,#0x0] ; Length
  205:   if (CBW.dDataLength != Length) {
 0000003E  4800      LDR         R0,=Length ; Length
 00000040  6801      LDR         R1,[R0,#0x0] ; Length
 00000042  4800      LDR         R2,=CBW + 0x8 ; CBW+8
 00000044  7810      LDRB        R0,[R2,#0x0] ; CBW+8
 00000046  7853      LDRB        R3,[R2,#0x1] ; CBW+8
 00000048  021B      LSL         R3,R3,#0x8
 0000004A  4318      ORR         R0,R3
 0000004C  7893      LDRB        R3,[R2,#0x2] ; CBW+8
 0000004E  041B      LSL         R3,R3,#0x10
 00000050  4318      ORR         R0,R3
 00000052  78D3      LDRB        R3,[R2,#0x3] ; CBW+8
 00000054  061B      LSL         R3,R3,#0x18
 00000056  4318      ORR         R0,R3
 00000058  4288      CMP         R0,R1
 0000005A  D00C      BEQ         L_27  ; T=0x00000076
  206:     USB_SetStallEP(MSC_EP_IN);
 0000005C  2081      MOV         R0,#0x81
 0000005E  F7FF      BL          USB_SetStallEP?T  ; T=0x0001  (1)
 00000060  FFCF      BL          USB_SetStallEP?T  ; T=0x0001  (2)
  207:     USB_SetStallEP(MSC_EP_OUT);
 00000062  2002      MOV         R0,#0x2
 00000064  F7FF      BL          USB_SetStallEP?T  ; T=0x0001  (1)
 00000066  FFCC      BL          USB_SetStallEP?T  ; T=0x0001  (2)
  208:     CSW.bStatus = CSW_PHASE_ERROR;
 00000068  2102      MOV         R1,#0x2
 0000006A  4800      LDR         R0,=CSW + 0xC ; CSW+12
 0000006C  7001      STRB        R1,[R0,#0x0] ; CSW+12
  209:     MSC_SetCSW();
 0000006E  F7FF      BL          MSC_SetCSW?T  ; T=0x0001  (1)
 00000070  FFC7      BL          MSC_SetCSW?T  ; T=0x0001  (2)
  210:     return (FALSE);
 00000072  2000      MOV         R0,#0x0
 00000074  E000      B           L_28  ; T=0x00000078
  211:   }
 00000076          L_27:
  213:   return (TRUE);
 00000076  2001      MOV         R0,#0x1
 00000078            ; SCOPE-END
  214: }
 00000078          L_28:
 00000078  BC08      POP         {R3}
 0000007A  4718      BX          R3
 0000007C          ENDP ; 'MSC_RWSetup?T'


*** CODE SEGMENT '?PR?DataInFormat?T?mscuser':
  223: BOOL DataInFormat (void) {
 00000000  B500      PUSH        {LR}
  225:   if (CBW.dDataLength == 0) {
 00000002  4800      LDR         R1,=CBW + 0x8 ; CBW+8
 00000004  7808      LDRB        R0,[R1,#0x0] ; CBW+8
 00000006  784A      LDRB        R2,[R1,#0x1] ; CBW+8
 00000008  0212      LSL         R2,R2,#0x8
 0000000A  4310      ORR         R0,R2
ARM COMPILER V2.53,  mscuser                                                               24/09/06  22:23:19  PAGE 19  

 0000000C  788A      LDRB        R2,[R1,#0x2] ; CBW+8

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