mmu.c

Hermit-at-1.1.3,一款bootloader

#include <hermit.h>
#include <target/memzero.h>
#include "mmu.h"
#include "memregions.h"

/****************************************************************************
 * 
 ****************************************************************************/
static void
mmu_create_page_table(struct page_table *pt)
{
	volatile unsigned long *table;
	unsigned long offset;
	unsigned long i;

	offset = MMU_TRANSLATION_TABLE_BASE + (pt->vaddr >> 18);
	for (i = 0; i < (pt->size >> 20); i++) {
		table = (volatile unsigned long *)(offset + (i << 2));
		*table = ((pt->paddr & 0xfff00000) | (i << 20) | pt->option);
	}
}

/****************************************************************************
 * 
 ****************************************************************************/
void
boost_on(int mode)
{
	int i;

	struct page_table pt_list[] = {
		/* Physical,  Virtual,    Size,       Option */
		/*-------------------------------------------*/
		/* Internal Register */
		{0x43f00000, 0x43f00000, 0x3c100000, 0xc02},
		/* SDRAM */
		{0x80000000, 0x80000000, 0x08000000, 0xc0e},
		/* Flash */
		{0xa0000000, 0xa0000000, 0x02000000, 0xc02},
		/* CS3 (SMSC911x) */
		{0xb2000000, 0xb2000000, 0x02000000, 0xc02},

	};

	memzero((void *)MMU_TRANSLATION_TABLE_BASE,
		MMU_TRANSLATION_TABLE_SIZE);

	for (i=0; i<ARRAY_SIZE(pt_list); i++)
		mmu_create_page_table(&pt_list[i]);

	__asm__ volatile 
	  (
	   "mov r0, #0;"
	   "mcr p15, 0, r0, c7, c7;"
	   "mcr p15, 0, r0, c7, c10, 4;"
	   "mcr p15, 0, r0, c8, c7;"
	   "mcr p15, 0, %0, c2, c0;"
	   "mov r0, #0x03;"
	   "mcr p15, 0, r0, c3, c0;"
	   "ldr r0, =0x0005387f;"
	   "mcr p15, 0, r0, c1, c0;"
	   :
	   : "r" (MMU_TRANSLATION_TABLE_BASE)
	   );
}

/****************************************************************************
 * 
 ****************************************************************************/
void
boost_off(void)
{
	__asm__ volatile 
	  (
	   "mov r0, #0;"
	   "mcr p15, 0, r0, c7, c14, 0;"
	   "mcr p15, 0, r0, c7, c10, 4;" /* drain the write buffer */
	   "mcr p15, 0, r0, c7, c5, 0;"  /* invalidate I cache */
	   "mrc p15, 0, r0, c1, c0, 0;"  /* read c1 */
	   "bic r0, r0, #0x7;"           /* disable DCache and MMU */
	   "bic r0, r0, #0x1000;"        /* disable ICache */
	   "mcr p15, 0, r0, c1, c0, 0;"  /*  */
	   "nop;"                        /* flush i+d-TLBs */
	   "nop;"                        /* flush i+d-TLBs */
	   "nop;"                        /* flush i+d-TLBs */
	   :
	   :
	   : "r0","memory"               /* clobber list */
	   );
}