syslib.c

vxworks MPC8541 BSP

            break;
            }
        }
    while (TRUE); /* breaks above when delay time is met */
    }

void sysMsDelay
    (
    UINT      delay                   /* length of time in MS to delay */
    )
    {
    sysUsDelay ( (UINT32) delay * 1000 );
    }

/*********************************************************************
 *
 * sysDelay - Fixed 1ms delay. Just calls sysMsDelay
 *
 * sysDelay(void)
 *
 * RETURNS : NONE
 *
 */

void sysDelay (void)
    {
    sysMsDelay (1);
    }

/***************************************************************************
*
* sysIntConnect - connect the BSP interrupt to the proper epic/i8259 handler.
*
* This routine checks the INT level and connects the proper routine.
* pciIntConnect() or intConnect().
*
* RETURNS:
* OK, or ERROR if the interrupt handler cannot be built.
*
*/

STATUS sysIntConnect
    (
    VOIDFUNCPTR *vector,        /* interrupt vector to attach to     */
    VOIDFUNCPTR routine,        /* routine to be called              */
    int parameter               /* parameter to be passed to routine */
    )
    {
    int tmpStat = ERROR;
    UINT32 read;

    if (((int) vector < 0) || ((int) vector >= EXT_VEC_IRQ0 + EXT_MAX_IRQS))
	{
	logMsg ("Error in sysIntConnect: out of range vector = %d.\n",
		(int)vector,2,3,4,5,6);

	return (ERROR);
	}
/*lint -e611*/
    if (vxMemProbe ((char *) routine, VX_READ, 4, (char *) &read) != OK)
	{
	logMsg ("Error in sysIntConnect: Cannot access routine.\n",
		1,2,3,4,5,6);
	return (ERROR);
	}
/*lint +e611*/
    if ((int) vector < EXT_VEC_IRQ0)
        {
	tmpStat = intConnect (vector, routine, parameter);
        }
    else
        {
        /* call external int controller connect */
	/* tmpStat = cascadeIntConnect (vector, routine, parameter); */
        }

    if (tmpStat == ERROR)
	{
	logMsg ("Error in sysIntConnect: Connecting vector = %d.\n",
		(int)vector,2,3,4,5,6);
	}

    return (tmpStat);
    }

#if 0
/***************************************************************************
*
* sysCascadeIntConnect - connect an external controller interrupt
*
* This function call is used to connect an interrupt outside of the MPC8540 PIC.
*
* RETURNS: OK or ERROR if unable to connect interrupt.
*/

STATUS sysCascadeIntConnect
    (
    VOIDFUNCPTR *vector,        /* interrupt vector to attach to     */
    VOIDFUNCPTR routine,        /* routine to be called              */
    int parameter               /* parameter to be passed to routine */
    )
    {
    return (ERROR);
    }
#endif /* 0 */

/*******************************************************************************
*
* sysIntEnable - enable an interrupt
*
* This function call is used to enable an interrupt.
*
* RETURNS: OK or ERROR if unable to enable interrupt.
*/

STATUS sysIntEnable
    (
    int intNum
    )
    {
    int tmpStat = ERROR;
    if (((int) intNum < 0) || ((int) intNum >= EXT_NUM_IRQ0 + EXT_MAX_IRQS))
	{
	logMsg ("Error in sysIntEnable: Out of range intNum = %d.\n",
		(int)intNum,2,3,4,5,6);

	return (ERROR);
	}

    if ((int) intNum < EXT_NUM_IRQ0)
        {
	tmpStat = intEnable (intNum);
        }
    else
        {
        /* call external int controller connect */
	tmpStat = sysCascadeIntEnable (intNum - EXT_NUM_IRQ0);
        }

    if (tmpStat == ERROR)
	{
	logMsg ("Error in sysIntEnable: intNum = %d.\n",
		(int)intNum,2,3,4,5,6);
	}

    return (tmpStat);
    }

/****************************************************************************
*
* sysCascadeIntEnable - enable an external controller interrupt
*
* This function call is used to enable an interrupt outside of the MPC8540 PIC.
*
* RETURNS: OK or ERROR if unable to enable interrupt.
*/

STATUS sysCascadeIntEnable
    (
    int intNum
    )
    {
    return (ERROR);
    }

/****************************************************************************
*
* sysIntDisable - disable an interrupt
*
* This function call is used to disable an interrupt.
*
* RETURNS: OK or ERROR if unable to disable interrupt.
*/

STATUS sysIntDisable
    (
    int intNum
    )
    {
    int tmpStat = ERROR;
    if (((int) intNum < 0) || ((int) intNum >= EXT_NUM_IRQ0 + EXT_MAX_IRQS))
	{
	logMsg ("Error in sysIntDisable: Out of range intNum = %d.\n",
		(int)intNum,2,3,4,5,6);

	return (ERROR);
	}

    if ((int) intNum < EXT_NUM_IRQ0)
        {
	tmpStat = intDisable (intNum);
        }
    else
        {
        /* call external int controller connect */
	tmpStat = sysCascadeIntDisable (intNum - EXT_NUM_IRQ0);
        }

    if (tmpStat == ERROR)
	{
	logMsg ("Error in sysIntDisable: intNum = %d.\n",
		(int)intNum,2,3,4,5,6);
	}

    return (tmpStat);
    }

/**************************************************************************
*
* sysCascadeIntDisable - disable an external controller interrupt
*
* This function call is used to disable an interrupt outside of the MPC8540 PIC.
*
* RETURNS: OK or ERROR if unable to disable interrupt.
*/

STATUS sysCascadeIntDisable
    (
    int intNum
    )
    {
    return (ERROR);
    }

/***********************************************************************
 * 
 * sysL1CacheQuery - Populates L1 cache size and alignment from 
 * configuration registers.
 *
 * RETURNS : NONE
 */

#ifdef INCLUDE_CACHE_SUPPORT
LOCAL void sysL1CacheQuery()
    {
    UINT32 temp;
    UINT32 align;
    UINT32 cachesize;
   
    temp = vxL1CFG0Get();

    cachesize = (temp & 0xFF) << 10;

    align = (temp >> 23) & 0x3;


    switch (align)
	{
	case 0:
	    ppcE500CACHE_ALIGN_SIZE=32;
	    break;
	case 1:
	    ppcE500CACHE_ALIGN_SIZE=64;
	    break;
	default:
	    ppcE500CACHE_ALIGN_SIZE=32;
	    break;
	}       
   
    ppcE500DCACHE_LINE_NUM = (cachesize / ppcE500CACHE_ALIGN_SIZE);
    ppcE500ICACHE_LINE_NUM = (cachesize / ppcE500CACHE_ALIGN_SIZE);

    /* The core manual suggests for a 32 byte cache line and 8 lines per set 
       we actually need 12 unique address loads to flush the set. 
       The number of lines to flush should be ( 3/2 * cache lines ) */
    ppcE500DCACHE_LINE_NUM = (3*ppcE500DCACHE_LINE_NUM)>>1;
    ppcE500ICACHE_LINE_NUM = (3*ppcE500ICACHE_LINE_NUM)>>1;

    }

#endif /* INCLUDE_CACHE_SUPPORT */

/***************************************************************************
 *
 * saveExcMsg - write exception message to save area for catastrophic error
 *
 * The message will be displayed upon rebooting with a bootrom.
 *
 */

void saveExcMsg (
    char *errorMsg
    )
    {
    strcpy ((char *)EXC_MSG_OFFSET, errorMsg);
    }


void chipErrataCpu29Print(void)
    {
    saveExcMsg("Silicon fault detected, possible machine state corruption.\nSystem rebooted to limit damage.");
    }

/***************************************************************************
*
* vxImmrGet - Returns the CPM DP Ram base address for CPM device drivers
*
*/

UINT32 vxImmrGet()
    {
    return (CCSBAR + 0x80000);
    }

#if defined (_GNU_TOOL)
void sysIntHandler (void)
    {
    }

void vxDecInt (void)
    {
    }

int excRtnTbl = 0;
#endif  /* _GNU_TOOL */

#ifdef INCLUDE_SHOW_ROUTINES
/***************************************************************************
 *
 * coreLbcShow - Show routine for local bus controller
 * 
 * RETURNS - NONE
 */

void coreLbcShow(void)
    {
    VINT32 tmp, tmp2;

    tmp = * (VINT32 *) M85XX_BR0(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR0(CCSBAR);
    printf("Local bus BR0 = 0x%x\tOR0 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR1(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR1(CCSBAR);
    printf("Local bus BR1 = 0x%x\tOR1 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR2(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR2(CCSBAR);
    printf("Local bus BR2 = 0x%x\tOR2 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR3(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR3(CCSBAR);
    printf("Local bus BR3 = 0x%x\tOR3 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR4(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR4(CCSBAR);
    printf("Local bus BR4 = 0x%x\tOR4 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR5(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR5(CCSBAR);
    printf("Local bus BR5 = 0x%x\tOR5 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR6(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR6(CCSBAR);
    printf("Local bus BR6 = 0x%x\tOR6 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_BR7(CCSBAR);
    tmp2 = * (VINT32 *) M85XX_OR7(CCSBAR);
    printf("Local bus BR7 = 0x%x\tOR7 = 0x%x\n", tmp, tmp2);

    tmp = * (VINT32 *) M85XX_LBCR(CCSBAR);
    printf("Local bus LBCR = 0x%x\n", tmp);

    tmp = * (VINT32 *) M85XX_LCRR(CCSBAR);
    printf("Local bus LCRR = 0x%x\n", tmp);
    }

#define xbit0(x, n)    ((x & (1 << (31 - n))) >> (31 - n))  /* 0..31 */
#define xbit32(x, n)   ((x & (1 << (63 - n))) >> (63 - n))  /* 32..63 */
#define onoff0(x, n)   xbit0(x, n) ? "ON", "OFF"
#define onoff32(x, n)  xbit32(x, n) ? "ON", "OFF"
/***************************************************************************
 *
 * coreShow - Show routine for core registers
 * 
 * RETURNS - NONE
 */
 
/*lint -e564*/
void coreShow(void)
    {
    VUINT32 tmp, tmp2;

    tmp = vxMsrGet();
    printf("MSR - 0x%x\n", tmp);
    printf("      UCLE-%x SPE-%x WE-%x CE-%x EE-%x PR-%x ME-%x\n",
           xbit32(tmp,37), xbit32(tmp,38), xbit32(tmp,45), xbit32(tmp,46),
           xbit32(tmp,48), xbit32(tmp,49), xbit32(tmp,51));
    printf("      UBLE-%x DE-%x IS-%x DS-%x PMM-%x\n",
           xbit32(tmp,53), xbit32(tmp,54), xbit32(tmp,58), xbit32(tmp,59),
           xbit32(tmp,61));
    tmp = vxHid0Get();
    tmp2 = vxHid1Get();
    printf("HID0 = 0x%x, HID1 = 0x%x\n", tmp, tmp2);
    tmp = vxL1CSR0Get();
    printf("L1CSR0: cache is %s - 0x%x\n", tmp&1?"ON":"OFF", tmp);
    tmp = vxL1CSR1Get();
    printf("L1CSR1: Icache is %s - 0x%x\n", tmp&1?"ON":"OFF", tmp);
    tmp = vxL1CFG0Get();
    tmp2 = vxL1CFG1Get();
    printf("L1CFG0 = 0x%x, L1CFG1 = 0x%x\n", tmp, tmp2);
    tmp = *(VUINT32 *) (CCSBAR + 0x20000);
    printf("L2CTL - 0x%x\n", tmp);
    printf("        l2 is %s\n", tmp&0x80000000?"ON":"OFF");
    printf("        l2siz-%x l2blksz-%x l2do-%x l2io-%x\n",
           (xbit0(tmp,2)<<1)|xbit0(tmp,3), (xbit0(tmp,4)<<1)|xbit0(tmp,5),
           xbit0(tmp,9), xbit0(tmp,10));
    printf("        l2pmextdis-%x l2intdis-%x l2sram-%x\n",
           xbit0(tmp,11), xbit0(tmp,12),
           (xbit0(tmp,13)<<2)|(xbit0(tmp,14)<<1)|xbit0(tmp,15));
    tmp = *(VUINT32 *) (CCSBAR + 0x20100);
    tmp2 = *(VUINT32 *) (CCSBAR + 0x20108);
    printf("L2SRBAR0 - 0x%x\n", tmp);
    printf("L2SRBAR1 - 0x%x\n", tmp2);

    printf("Core Freq = %3d Hz\n",coreFreq);
    printf("CCB Freq = %3d Hz\n",sysClkFreqGet());
    printf("PCI Freq = %3d Hz\n",OSCILLATOR_FREQ);
    printf("CPM Freq = %3d Hz\n",sysClkFreqGet());

    }
/*lint +e564*/
#endif

/*******************************************************************************
* flashHwInit - hardware initialization to flash
*
* This routine initialize the hardware to flash
*
* .nT
*
* RETURNS: N/A
*
* SEE ALSO: flashHwEnable(), flashHwDisable(),
* .sA
*/

void flashHwInit(void)
{
    int immrVal = vxImmrGet();

    *M8260_IOP_PCPAR(immrVal) &= ~FLASH_PROTECT_PORT;
    *M8260_IOP_PCDIR(immrVal) |=  FLASH_PROTECT_PORT;
    *M8260_IOP_PCODR(immrVal) &= ~FLASH_PROTECT_PORT;
    *M8260_IOP_PCDAT(immrVal) &= ~FLASH_PROTECT_PORT;
}

/*******************************************************************************
* flashHwEnable - enable write to flash
*
* This routine enables the write
*
* .nT
*
* RETURNS: N/A
*
* SEE ALSO: flashHwInit(), flashHwDisable(),
* .sA
*/

void flashHwEnable(void)
{
    int immrVal = vxImmrGet();

    *M8260_IOP_PCDAT(immrVal) |=  FLASH_PROTECT_PORT;
    sysUsDelay (1);
}

/*******************************************************************************
* flashHwDisable - Disable write to flash
*
* This routine Disable the write
*
* .nT
*
* RETURNS:  N/A
*
* SEE ALSO: flashHwInit(), flashHwEnable(),
* .sA
*/

void flashHwDisable(void)
{
    int immrVal = vxImmrGet();

    *M8260_IOP_PCDAT(immrVal) &= ~FLASH_PROTECT_PORT;
    sysUsDelay (1);
}


#ifdef INCLUDE_AG_END

#include "endLib.h"
#include "ipProto.h"

extern END_OBJ* zxAgLoad(char* initString);

char * getEthMediaDeviceName(void)  
{
	return "zxAg";

}


END_OBJ * sysAgEndLoad(char * pParamStr,void * unused)
{
    END_OBJ * pEnd;

    pEnd = zxAgLoad(pParamStr);
    if (pEnd == (END_OBJ *)ERROR)
    {
        logMsg ("zxAgLoad : failed to load driver\n", 0, 0, 0, 0, 0, 0);
    }

    return pEnd;
}

#define ZXAG_LOAD_STRING    "0xff000000:0x07:-1:0x0:-1:-1:0x80:0x80:0x0:0xff:0x00:0x0219"

int zxAgEndInit(void)
{
    void * pEnd = NULL;
    
    pEnd = muxDevLoad(0, sysAgEndLoad, ZXAG_LOAD_STRING, 1, NULL);
    if (pEnd == NULL)
    {
        printf("zxAgEndInit : muxDevLoad Failed!\n");
        
        return ERROR;
    }

    if (muxDevStart (pEnd) != OK)
    {
        printf("zxAgEndInit : Failed to start device\n");

        return (ERROR);
    }
    
    if (ipAttach (0, "zxAg") != OK)
    {
        printf ("zxAgEndInit : Failed to attach TCP/IP\n");
        return (ERROR);
	}

	return OK;
}
#endif