📄 sysbuspci.c
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/* sysBusPci.c - Motorola MPC85xx platform-specific PCI bus support *//* Copyright 1996-2004 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01d,19nov04,dtr Mod to interrupt line order.01c,18mar04,dtr Add support for Rev 2 silicon - new device ID for bridge.01b,31jul03,dtr Temporary fix for bad interrupt wiring on board.01a,04jul02,dtr Motorola MPC85xx file created from ads826x BSP.*//*DESCRIPTIONThis is the platform specific pciAutoConfigLib information.*//* includes */#include "vxWorks.h"#include "config.h"#include "sysLib.h"#include "drv/pci/pciConfigLib.h"#include "drv/pci/pciIntLib.h" #include "drv/pci/pciAutoConfigLib.h"#include "sysBusPci.h"/* static file scope locals */IMPORT void sysPciOutLong(UINT32*,UINT32);IMPORT UINT32 sysPciInLong (UINT32*);LOCAL PCI_SYSTEM sysParams;#ifdef INCLUDE_SECONDARY_PCILOCAL PCI_SYSTEM sysParams2;#endif /* INCLUDE_SECONDARY_PCI *//* INT LINE TO IRQ assignment for MPC85xxADS-PCI board. */#ifdef INTERRUPT_ROUTING_TABLE INTERRUPT_ROUTING_TABLE#endifLOCAL UCHAR sysPciIntRoute [NUM_PCI_SLOTS][4] = { {PCI_XINT1_LVL, PCI_XINT2_LVL, PCI_XINT3_LVL, PCI_XINT4_LVL}, /* slot 1 */ {PCI_XINT4_LVL, PCI_XINT1_LVL, PCI_XINT2_LVL, PCI_XINT3_LVL}, /* slot 2 */ {PCI_XINT3_LVL, PCI_XINT4_LVL, PCI_XINT1_LVL, PCI_XINT2_LVL}, /* slot 3 */ {PCI_XINT2_LVL, PCI_XINT3_LVL, PCI_XINT4_LVL, PCI_XINT1_LVL}, /* slot 4 */};/********************************************************************************* sysPciAutoConfig - PCI autoconfig support routine** RETURNS: N/A*/void sysPciAutoConfig (void) { void * pCookie; /* PCI 1 Auto configuration */ sysPciConfigEnable (1); /* 32-bit Prefetchable Memory Space */ sysParams.pciMem32 = PCI_MEM_ADRS; sysParams.pciMem32Size = PCI_MEM_SIZE; /* 32-bit Non-prefetchable Memory Space */ sysParams.pciMemIo32 = PCI_MEMIO_ADRS; sysParams.pciMemIo32Size = PCI_MEMIO_SIZE; /* 32-bit PCI I/O Space */ sysParams.pciIo32 = PCI_IO_ADRS; sysParams.pciIo32Size = PCI_IO_SIZE; /* Configuration space parameters */ sysParams.maxBus = 0; sysParams.cacheSize = ( _CACHE_ALIGN_SIZE / 4 ); sysParams.maxLatency = PCI_LAT_TIMER; /* * Interrupt routing strategy * across PCI-to-PCI Bridges */ sysParams.autoIntRouting = TRUE; /* Device inclusion and interrupt routing routines */ sysParams.includeRtn = sysPciAutoconfigInclude; sysParams.intAssignRtn = sysPciAutoconfigIntrAssign; /* * PCI-to-PCI Bridge Pre- * and Post-enumeration init * routines */ sysParams.bridgePreConfigInit = NULL; /* sysPciAutoconfigPreEnumBridgeInit; */ sysParams.bridgePostConfigInit = NULL; /* sysPciAutoconfigPostEnumBridgeInit; */ /* * Perform any needed PCI Host Bridge * Initialization that needs to be done * before pciAutoConfig is invoked here * utilizing the information in the * newly-populated sysParams structure. */ pCookie = pciAutoConfigLibInit (NULL); pciAutoCfgCtl (pCookie, PCI_PSYSTEM_STRUCT_COPY, &sysParams); pciAutoCfg (pCookie); /* * Perform any needed post-enumeration * PCI Host Bridge Initialization here * utilizing the information in the * sysParams structure that has been * updated as a result of the scan * and configuration passes. */#ifdef INCLUDE_SECONDARY_PCI /* PCI 2 Auto configuration */ sysPciConfigEnable (2); /* 32-bit Prefetchable Memory Space */ sysParams2.pciMem32 = PCI_MEM_ADRS2; sysParams2.pciMem32Size = PCI_MEM_SIZE; /* 32-bit Non-prefetchable Memory Space */ sysParams2.pciMemIo32 = PCI_MEMIO_ADRS2; sysParams2.pciMemIo32Size = PCI_MEMIO_SIZE; /* 32-bit PCI I/O Space */ sysParams2.pciIo32 = PCI_IO_ADRS2; sysParams2.pciIo32Size = PCI_IO_SIZE; /* Configuration space parameters */ sysParams2.maxBus = 0; sysParams2.cacheSize = ( _CACHE_ALIGN_SIZE / 4 ); sysParams2.maxLatency = PCI_LAT_TIMER; /* * Interrupt routing strategy * across PCI-to-PCI Bridges */ sysParams2.autoIntRouting = TRUE; /* Device inclusion and interrupt routing routines */ sysParams2.includeRtn = sysPci2AutoconfigInclude; sysParams2.intAssignRtn = sysPci2AutoconfigIntrAssign; /* * PCI-to-PCI Bridge Pre- * and Post-enumeration init * routines */ sysParams2.bridgePreConfigInit = NULL; /* sysPciAutoconfigPreEnumBridgeInit; */ sysParams2.bridgePostConfigInit = NULL; /* sysPciAutoconfigPostEnumBridgeInit; */ /* * Perform any needed PCI Host Bridge * Initialization that needs to be done * before pciAutoConfig is invoked here * utilizing the information in the * newly-populated sysParams structure. */ pCookie = pciAutoConfigLibInit (NULL); pciAutoCfgCtl (pCookie, PCI_PSYSTEM_STRUCT_COPY, &sysParams2); pciAutoCfg (pCookie); /* * Perform any needed post-enumeration * PCI Host Bridge Initialization here * utilizing the information in the * sysParams structure that has been * updated as a result of the scan * and configuration passes. */#endif /* INCLUDE_SECONDARY_PCI */ }/********************************************************************************* sysPciAutoconfigInclude - PCI autoconfig support routine** RETURNS: OK or ERROR*/STATUS sysPciAutoconfigInclude ( PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */ PCI_LOC * pLoc, /* pointer to function in question */ UINT devVend /* deviceID/vendorID of device */ ) { /* Don't want to auto configure the bridge */ if ((devVend == PCI_DEV_ID_85XX) || (devVend == PCI_DEV_ID_82XX)) return(ERROR); return OK; /* Autoconfigure all devices */ }/********************************************************************************* sysPci2AutoconfigInclude - PCI 2 autoconfig support routine** RETURNS: OK or ERROR*/STATUS sysPci2AutoconfigInclude ( PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */ PCI_LOC * pLoc, /* pointer to function in question */ UINT devVend /* deviceID/vendorID of device */ ) { /* Don't want to auto configure the bridge */ if ((devVend == PCI_DEV_ID_85XX) || (devVend == PCI_DEV_ID_82XX)) return(ERROR); return OK; /* Autoconfigure all devices */ }/********************************************************************************* sysPciAutoconfigIntrAssign - PCI autoconfig support routine** RETURNS: PCI interrupt line number given pin mask*/UCHAR sysPciAutoconfigIntrAssign ( PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */ PCI_LOC * pLoc, /* pointer to function in question */ UCHAR pin /* contents of PCI int pin register */ ) { UCHAR tmpChar = 0xff; /* * Ensure this is a resonable value for bus zero. * If OK, return INT level, else we return 0xff. */ tmpChar = intLine [(pLoc->device)][(pin - 1)]; /* return the value to be assigned to the pin */ return (tmpChar); }/********************************************************************************* sysPci2AutoconfigIntrAssign - PCI 2 autoconfig support routine** RETURNS: PCI interrupt line number given pin mask*/UCHAR sysPci2AutoconfigIntrAssign ( PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */ PCI_LOC * pLoc, /* pointer to function in question */ UCHAR pin /* contents of PCI int pin register */ ) { UCHAR tmpChar = 0xff; /* * Ensure this is a resonable value for bus zero. * If OK, return INT level, else we return 0xff. */ if (((pin > 0) && (pin < 5)) && (((pLoc->device) - PCI_SLOT1_DEVNO) < NUM_PCI_SLOTS) && (((pLoc->device) - PCI_SLOT1_DEVNO) >= 0)) { tmpChar = sysPciIntRoute [((pLoc->device) - PCI_SLOT1_DEVNO)][(pin - 1)]; } /* return the value to be assigned to the pin */ return (tmpChar); }/********************************************************************************* sysPciAutoconfigPreEnumBridgeInit - PCI autoconfig support routine** RETURNS: N/A*/void sysPciAutoconfigPreEnumBridgeInit ( PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */ PCI_LOC * pLoc, /* pointer to function in question */ UINT devVend /* deviceID/vendorID of device */ ) { return; }/********************************************************************************* sysPciAutoconfigPostEnumBridgeInit - PCI autoconfig support routine** RETURNS: N/A*/void sysPciAutoconfigPostEnumBridgeInit ( PCI_SYSTEM * pSys, /* PCI_SYSTEM structure pointer */ PCI_LOC * pLoc, /* pointer to function in question */ UINT devVend /* deviceID/vendorID of device */ ) { return; }
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