motfcc2end.h

vxworks MPC8541 BSP

    UINT32              numRxStallsCleared;

    UINT32              numTxStallsEntered;
    UINT32              numTxStallsCleared;
    UINT32              numTxStallErrors;

    UINT32              numLSCHandlerEntries;
    UINT32              numLSCHandlerExits;

    UINT32              motFccTxErr;
    UINT32              motFccHbFailErr;
    UINT32              motFccTxLcErr;
    UINT32              motFccTxUrErr;
    UINT32              motFccTxCslErr;
    UINT32              motFccTxRlErr;
    UINT32              motFccTxDefErr;

    UINT32              motFccRxLgErr;
    UINT32              motFccRxNoErr;
    UINT32              motFccRxCrcErr;
    UINT32              motFccRxOvErr;
    UINT32              motFccRxShErr;
    UINT32              motFccRxLcErr;
    UINT32              motFccRxMemErr;
}FCC_DRIVER_STATS;


/*---------------------------------------------------------------------*/
/*       F C C   E T H E R N E T   P A R A M E T E R S                 */
/*---------------------------------------------------------------------*/
typedef volatile unsigned long VULONG;
typedef volatile unsigned short VUSHORT;
typedef volatile unsigned char VUCHAR;

#pragma pack(1)

typedef struct {
    VULONG    stat_bus;       /* Internal use buffer. */
    VULONG    cam_ptr;        /* CAM address. */
    VULONG    c_mask;         /* CRC constant mask*/
    VULONG    c_pres;       /* CRC preset */
    VULONG    crcec;          /* CRC error counter */
    VULONG    alec;           /* alignment error counter */
    VULONG    disfc;          /* discarded frame counter */
    VUSHORT   ret_lim;        /* Retry limit threshold. */
    VUSHORT   ret_cnt;        /* Retry limit counter. */
    VUSHORT   p_per;          /* persistence */
    VUSHORT   boff_cnt;       /* back-off counter */
    VULONG    gaddr_h;        /* group address filter, high */
    VULONG    gaddr_l;        /* group address filter, low */
    VUSHORT   tfcstat;        /* out of sequece Tx BD staus. */
    VUSHORT   tfclen;         /* out of sequece Tx BD length. */
    VULONG    tfcptr;         /* out of sequece Tx BD data pointer. */
    VUSHORT   maxflr;         /* maximum frame length reg */
    VUSHORT   paddr_h;        /* physical address (MSB) */
    VUSHORT   paddr_m;        /* physical address */
    VUSHORT   paddr_l;        /* physical address (LSB) */
    VUSHORT   ibd_cnt;        /* internal BD counter. */
    VUSHORT   ibd_start;      /* internal BD start pointer. */
    VUSHORT   ibd_end;        /* internal BD end pointer. */
    VUSHORT   tx_len;         /* tx frame length counter */
    VUCHAR    ibd_base[0x20]; /* internal micro code usage. */
    VULONG    iaddr_h;        /* individual address filter, high */
    VULONG    iaddr_l;        /* individual address filter, low */
    VUSHORT   minflr;         /* minimum frame length reg */
    VUSHORT   taddr_h;        /* temp address (MSB) */
    VUSHORT   taddr_m;        /* temp address */
    VUSHORT   taddr_l;        /* temp address (LSB) */
    VUSHORT   pad_ptr;        /* pad_ptr. */
    VUSHORT   cf_type;        /* flow control frame type coding. */
    VUSHORT   cf_range;       /* flow control frame range. */
    VUSHORT   max_b;          /* max buffer descriptor byte count. */
    VUSHORT   maxd1;          /* max DMA1 length register. */
    VUSHORT   maxd2;          /* max DMA2 length register. */
    VUSHORT   maxd;           /* Rx max DMA. */
    VUSHORT   dma_cnt;        /* Rx DMA counter. */


    /* counter: */
    VULONG    octc;           /* received octets counter. */
    VULONG    colc;           /* estimated number of collisions */
    VULONG    broc;           /* received good packets of broadcast address */
    VULONG    mulc;           /* received good packets of multicast address */
    VULONG    uspc;           /* received packets shorter then 64 octets. */
    VULONG    frgc;           /* as uspc + bad packets */
    VULONG    ospc;           /* received packets longer then 1518 =octets. */
    VULONG    jbrc;           /* as ospc + bad packets  */
    VULONG    p64c;           /* received packets of 64 octets.. */
    VULONG    p65c;           /* received packets of 65-128 octets.. */
    VULONG    p128c;          /* received packets of 128-255 octets.. */
    VULONG    p256c;          /* received packets of 256-511 octets.. */
    VULONG    p512c;          /* received packets of 512-1023 octets.. */
    VULONG    p1024c;          /* received packets of 1024-1518 octets.. */
    VULONG    cam_buf;        /* cam respond internal buffer. */
    VUSHORT   rfthr;          /* received frames threshold */
    VUSHORT   rfcnt;          /* received frames count */
} FCC_ETH_PARAM_T;
#pragma pack()


/*---------------------------------------------------------------------*/
/*               F C C     P A R A M E T E R S                         */
/*---------------------------------------------------------------------*/


#pragma pack(1)
typedef struct {
    VUSHORT   riptr;      /* Rx internal temporary data pointer. */
    VUSHORT   tiptr;      /* Tx internal temporary data pointer. */
    VUSHORT   RESERVED0;  /* Reserved */
    VUSHORT   mrblr;      /* Rx buffer length */
    VULONG    rstate;     /* Rx internal state */
    VULONG    rbase;      /* RX BD base address */
    VUSHORT   rbdstat;    /* Rx BD status and control */
    VUSHORT   rbdlen;     /* Rx BD data length */
    VULONG    rdptr;      /* rx BD data pointer */
    VULONG    tstate;     /* Tx internal state */
    VULONG    tbase;      /* TX BD base address */
    VUSHORT   tbdstat;    /* Tx BD status and control */
    VUSHORT   tbdlen;     /* Tx BD data length */
    VULONG    tdptr;      /* Tx  data pointer */
    VULONG    rbptr;      /* rx BD pointer */
    VULONG    tbptr;      /* Tx BD pointer */
    VULONG    rcrc;       /* Temp receive CRC */
    VULONG    tcrc;       /* Temp transmit CRC */
  VULONG foo;

/*-----------------------------------------------------------------*/
/*                   Protocol Specific Parameters                  */
/*-----------------------------------------------------------------*/
    union {

    /* Force this union to be 256 bytes - 0x34 bytes big.
        The 0x34 is the size of the protocol independent part
        of the structure.
    */
        UCHAR       pads[0xc4];
        FCC_ETH_PARAM_T     e;

    } prot;

} FCC_PARAM_T;
#pragma pack()


/*-----------------------------------------------------------------*/
/*                   FCC registers                                 */
/*-----------------------------------------------------------------*/
#pragma pack(1)
typedef struct {
    VULONG  fcc_gfmr;        /* General Mode Register */
    VULONG  fcc_psmr;        /* Protocol Specific Mode Reg */
    VUSHORT fcc_todr;        /* Transmit On Demand Reg */
    VUCHAR  reserved22[0x2];
    VUSHORT fcc_dsr;         /* Data Sync Register */
    VUCHAR  reserved23[0x2];
    VUSHORT fcc_fcce;        /* Event Register */
    VUSHORT unused1;
    VUSHORT fcc_fccm;        /* Mask Register */
    VUSHORT unused2;
    VUCHAR  fcc_fccs;        /* Status Register */
    VUCHAR  reserved24[0x3];
    VULONG  fcc_tirr;        /* Transmit Partial Rate Reg */
} FCC_REG_T;

#pragma pack()

typedef struct {
    volatile UINT16 bdStat;
    volatile UINT16 bdLen;
    volatile UINT32 bdAddr;
}FCC_BD;

/*
 * This is the bsp boot information structure for the Mii/Phy, Dpram
 * and misc funtions. It contains bsp specific call backs for the driver.
 * A pointer to the stucture is passed in the load string.
 */

typedef struct
    {
    FUNCPTR miiPhyInit;       /* bsp MiiPhy init function */
    FUNCPTR miiPhyInt;        /* Driver function for BSP to call */
    FUNCPTR miiPhyBitRead;    /* Bit Read funtion */
    FUNCPTR miiPhyBitWrite;   /* Bit Write function */
    FUNCPTR miiPhyDuplex;     /* duplex status call back */
    FUNCPTR miiPhySpeed;      /* speed status call back */
    FUNCPTR hbFail;           /* heart beat fail */
    FUNCPTR intDisc;          /* disconnect Function */
    FUNCPTR dpramFree;
    FUNCPTR dpramFccMalloc;
    FUNCPTR dpramFccFree;
    FUNCPTR reserved[4];      /* future use */
    } FCC_END_FUNCS;


/* The definition of the driver control structure */

typedef struct drv_ctrl
    {
    END_OBJ             endObj;         /* base class */
#ifdef MOT_FCC_STAT_MONITOR
    FCC_DRIVER_STATS   * Stats;
#endif
    int                 unit;           /* unit number */
    FCC_REG_T          * fccReg;
    FCC_ETH_PARAM_T    * fccEthPar;
    FCC_PARAM_T        * fccPar;

    UINT8       fccNum;         /* FCC being used */
    UINT32      immrVal;        /* internal RAM base address */
    UINT32      fifoTxBase;     /* address of Tx FIFO in internal RAM */
    UINT32      fifoRxBase;     /* address of Rx FIFO in internal RAM */
    char      * pBufBase;       /* FCC memory pool base */
    UINT32      bufSize;        /* FCC memory pool size */
    char      * pBdBase;        /* FCC BDs base */
    UINT32      bdSize;         /* FCC BDs size */
    void      * riPtr;          /* save for free in unload */
    void      * tiPtr;          /* save for free in unload */
    void      * padPtr;         /* save for free in unload */
/* receive buffer descripter management */

    UINT16      rbdNum;         /* number of TX bd's */
    FCC_BD    * pRbdNext;       /* RBD next to rx */
    FCC_BD    * pRbdLast;       /* RBD last to replenish */
    UINT16      rbdCnt;         /* number of rbds full */
    FCC_BD    * pRbdBase;       /* RBD ring */
    char     ** rBufList;       /* allocated clusters */
    UINT16      rxUnStallThresh; /* rx reclaim threshold */
    UINT16      rxStallThresh;   /* rx low water threshold */

    volatile BOOL rxStall;       /* rx handler stalled - no Tbd */

/* transmit buffer descripter management */

    UINT16      tbdNum;         /* number of TX bd's */
    FCC_BD    * pTbdNext;       /* TBD index */
    FCC_BD    * pTbdLast;       /* TBD index */
    UINT16      tbdFree;
    FCC_BD    * pTbdBase;        /* TBD ring base */
    M_BLK    ** tBufList;        /* allocated clusters */
    UINT16      txUnStallThresh; /* tx reclaim threshold */
    UINT16      txStallThresh;   /* tx low water threshold */

    volatile BOOL txStall;       /* tx handler stalled - no Tbd */

    UINT32      mblkMult;
    UINT32      clMult;

    ULONG       userFlags;      /* some user flags */
    BOOL        zeroBufFlag;
    INT8        flags;          /* driver state */
    UINT32      state;          /* driver state including load flag */
    BOOL        intrConnect;    /* interrupt has been connected */
    UINT32      intMask;        /* interrupt mask register */
    UINT32      fccIramAddr;    /* base addr of this fcc */
    UINT32      fccPramAddr;    /* parameter RAM addr of this fcc */
    UCHAR *     pTxPollBuf;     /* cluster pointer for poll mode */

    SEM_ID      graSem;         /* synch semaphore for graceful */
    /* transmit command */
    char *       pClBlkArea;     /* cluster block pointer */
    UINT32       clBlkSize;      /* clusters block memory size */
    char *       pMBlkArea;      /* mBlock area pointer */
    UINT32       mBlkSize;       /* mBlocks area memory size */
    CACHE_FUNCS  bufCacheFuncs;  /* cache descriptor */
    CL_POOL_ID   pClPoolId;      /* cluster pool identifier */
    PHY_INFO    *phyInfo;        /* info on a MII-compliant PHY */

    BOOL         lscHandling;

    /* function pointers to support debugging */
    FUNCPTR     netJobAdd;
    FUNCPTR     muxTxRestart;
    FUNCPTR     muxError;

    /* Bsp specific funtions and call backs passed in the load string */
    FCC_END_FUNCS * motFccFuncs;

    FUNCPTR   hbFailFunc;
    FUNCPTR   intDiscFunc;     /* assign a proper disc routine */
    FUNCPTR   phyInitFunc;     /* BSP Phy Init */
    FUNCPTR   phyDuplexFunc;   /* duplex function */
    FUNCPTR   phySpeedFunc;    /* speed function */

    FUNCPTR   dpramFreeFunc;
    FUNCPTR   dpramFccMallocFunc;
    FUNCPTR   dpramFccFreeFunc;

    } DRV_CTRL;


/*
 * this cache functions descriptors is used to flush/invalidate
 * the FCC's data buffers. They are set to the system's cache
 * flush and invalidate routine. This will allow proper operation
 * of the driver if data cache are turned on.
 */

/*
IMPORT STATUS   cacheInvalidate (CACHE_TYPE, void *, size_t);
IMPORT STATUS   cacheFlush (CACHE_TYPE, void *, size_t);
*/
IMPORT STATUS   sysFccEnetAddrGet (int unit,UCHAR *address);
IMPORT STATUS   sysFccEnetEnable (UINT32 immrVal, UINT8 fccNum);
IMPORT STATUS   sysFccEnetDisable (UINT32 immrVal, UINT8 fccNum);
IMPORT STATUS   sysFccMiiBitWr (UINT32 immrVal, UINT8 fccNum,
                INT32 bit);
IMPORT STATUS   sysFccMiiBitRd (UINT32 immrVal, UINT8 fccNum,
                INT8 * bit);
/*IMPORT STATUS   miiPhyInit (PHY_INFO * phyInfo);*/


#ifdef __cplusplus
}
#endif

#endif /* __INCmotFcc2Endh */