at89c51rd2.lst

keil与proteus联调

C51 COMPILER V8.15   AT89C51RD2                                                            09/24/2008 11:01:53 PAGE 1   


C51 COMPILER V8.15, COMPILATION OF MODULE AT89C51RD2
OBJECT MODULE PLACED IN AT89C51RD2.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE AT89C51RD2.C OPTIMIZE(0,SPEED) BROWSE DEBUG OBJECTEXTEND

line level    source

   1          #include <at89c51rd2.h>
   2          
   3          extern lcmInit();
   4          extern lcmCheckStatus(u8 a,u8 s); 
   5          extern lcmSendData(u8 d);
   6          extern lcmWriteData(u8 d1,u8 d2,u8 c,u8 n); 
   7          extern lcmReadData();
   8          
   9          void main()
  10          {
  11   1      /*=============================================================================================
  12   1              CKRL=0xff;      //Clock Reload Register
  13   1              PCON=0x10;      //SMOD1 SMOD0 - POF GF1 GF0 PD IDL
  14   1              CKCON0=0x00;    //- WDX2 PCAX2 SIX2 T2X2 T1X2 T0X2 X2
  15   1              CKCON1=0x00;    //- - - - - - - SPIX2
  16   1              AUXR1=0x00;     //- - ENBOOT - GF3 0 - DPS
  17   1              AUXR=HSB&0x08?0x0a:0x08;                //DPU - M0 XRS2 XRS1 XRS0 EXTRAM AO
  18   1              T2CON=0x00;     //TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2# CP/RL2#
  19   1              T2MOD=0x00;     //- - - - - - T2OE DCEN
  20   1              CMOD=0x00;      //CIDL WDTE - - - CPS1 CPS0 ECF
  21   1              CCON=0x00;      //CF CR - CCF4 CCF3 CCF2 CCF1 CCF0
  22   1              SCON=0x00;      //FE/SM0 SM1 SM2 REN TB8 RB8 TI RI
  23   1              BDRCON=0x00;    //- - - BRR TBCK RBCK SPD SRC
  24   1              KBF=0x00;       //KBF7 KBF6 KBF5 KBF4 KBF3 KBF2 KBF1 KBF0
  25   1              KBE=0x00;       //KBE7 KBE6 KBE5 KBE4 KBE3 KBE2 KBE1 KBE0
  26   1              KBLS=0x00;      //KBLS7 KBLS6 KBLS5 KBLS4 KBLS3 KBLS2 KBLS1 KBLS0
  27   1              SPCON=0x14;     //SPR2 SPEN SSDIS MSTR CPOL CPHA SPR1 SPR0
  28   1              IEN0=0x00;      //EA EC ET2 ES ET1 EX1 ET0 EX0
  29   1              IPL0=0x00;      //- PPCL PT2L PSL PT1L PX1L PT0L PX0L
  30   1              IPH0=0x00;      //- PPCH PT2H PSH PT1H PX1H PT0H PX0H
  31   1              IEN1=0x00;      //- - - - - ESPI - KBD
  32   1              IPL1=0x00;      //- - - - - SPIL TWIL KBDL
  33   1              IPH1=0x00;      //- - - - - SPIH - KBDH
  34   1              WDTRST=0x1e;    //Used to reset/enable the WDT by writing 01EH then 0E1H in sequence.
  35   1              WDTPRG=0x00;    //- - - - - S2 S1 S0
  36   1              EECON=0x00;     //- - - - - - EEE EEBUSY
  37   1      =============================================================================================*/
  38   1              u8 i=0;
  39   1      
  40   1              lcmInit();
  41   1              lcmWriteData(0xe0,0x01,0x24,2);                 //设置写地址
  42   1              lcmWriteData(0,0,0xb0,0);                       //设置自动写方式
  43   1              
  44   1              for(i=0;i<20;i++)
  45   1                      {
  46   2                      while(lcmCheckStatus(3,3));
  47   2                      lcmSendData(0xaa);
  48   2                      }
  49   1              lcmWriteData(0x00,0x00,0xb2,0); //自动写结束
  50   1              while(1);
  51   1      }


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =     77    ----
C51 COMPILER V8.15   AT89C51RD2                                                            09/24/2008 11:01:53 PAGE 2   

   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =      1    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)