📄 vx1828_au.lst
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178 3
C51 COMPILER V7.50 VX1828_AU 01/17/2006 21:30:46 PAGE 4
179 3 XIE_Power = 1;
180 3 irpower_flag = 0;
181 3 power_flag = ~power_flag;
182 3 LED_R=0;
183 3
184 3 #if _debug
185 3 printf("LED_R on. in if\n");TI=0;
186 3 #endif
187 3
188 3 if (power_flag)
189 3 {
190 4 open_5v();
191 4
192 4 #if _debug
193 4 printf("open 5v\n");
194 4 #endif
195 4
196 4 tmp=0x5a;
197 4 shi_sub_write(vx1828, 0x01, 00, &tmp);
198 4 Init_VX1828();aisel_func(0x86);DelayXms(0x10); // Initial VX1818
199 4 init_audio();
200 4 init_audio();
201 4
202 4 init_s35390();//zl.d
203 4
204 4 #if _debug
205 4 printf("init audio\n");
206 4 #endif
207 4
208 4 //BSTctrl = 0; DelayXms(0x30);
209 4 modestatus=0;
210 4 pcc = 1;
211 4 goto Restart2;
212 4 }
213 3 else // POWER OFF
214 3 { open_5v();
215 4 VX1828ctrl = 0; DelayXms(0x10);
216 4 BSTctrl = 1; DelayXms(0x10);
217 4 set_audio_switch(IN4);
218 4 LED_R=0;
219 4
220 4 #if _debug
221 4 printf("LED_R on.in else\n");
222 4 #endif
223 4
224 4 #if _debug
225 4 printf("open 5v\n");
226 4 #endif
227 4 //Clear all menu flag
228 4
229 4
230 4 power_flag=0;
231 4 topmenu_flag = 0;
232 4 britmenu_flag = 0;
233 4 volshow_flag = 0;
234 4 mute_flag = 0;
235 4 TR0 = 0;
236 4 EA=1;
237 4
238 4 #if _debug
239 4 printf("EA = 1 \n");
240 4 #endif
C51 COMPILER V7.50 VX1828_AU 01/17/2006 21:30:46 PAGE 5
241 4
242 4 ir_server();
243 4
244 4 #if _debug
245 4 printf("ir_server run\n");TI=0;
246 4 #endif
247 4
248 4 DelayXms(0xff); // Avoid error repress
249 4
250 4 }
251 3
252 3 #if _debug
253 3 printf("test dot 2\n");TI=0;
254 3 #endif
255 3
256 3 }
257 2
258 2 //==========================================================
259 2
260 2 ir_server();
261 2
262 2 //===========================================================
263 2 #if 1
264 2 // Check Video mode
265 2 // check_video_mode();
266 2 if (power_flag)
267 2 {
268 3 //get status |NOISE |PHALT |IS443 |VPRES |MODE[1:0] |FINEAGC|MVVALID|.
269 3 DelayXms(0x40);
270 3 EA=0;
271 3 shi_sub_read(VX1828,0xD3,0x00,&temp_data[0]);//DelayXms(0x10);
272 3 //printf("the video_format =%bx\n",video_format);
273 3 temp_data[0] >>= 2;
274 3 tempmode= temp_data[0] & 0x03; //get the mode .
275 3 //EA=1;
276 3
277 3 if (modestatus!=tempmode)
278 3 {
279 4 switch(tempmode)
280 4 {
281 5 case 0: // PAL N
282 5
283 5 #if _debug
284 5 printf("the video is PAL-N \n");
285 5 #endif
286 5
287 5 //temp_data[0] = hposPN_sel; // Address 0x3c
288 5 //temp_data[1] = vposPN_sel; // Address 0x3d
289 5 //temp_data[2] = 0x30; // Address 0x3e
290 5 //temp_data[3] = 0x1A; // Address 0x3f
291 5 //temp_data[4] = 0x32; // Address 0x40
292 5 //temp_data[5] = 0x7E; // Address 0x41
293 5 DelayXms(0x80);
294 5 //force bule panle .
295 5 #if LG
temp_data[0] = 0x16;
shi_sub_write(VX1828,0xC2,0x00,&temp_data[0]);// set TC6 |-| STV_ON |
temp_data[0] = 0x79;
shi_sub_write(VX1828,0xa6,0x00,&temp_data[0]);
temp_data[0] = 0x00;
shi_sub_write(VX1828,0xa5,0x00,&temp_data[0]);
temp_data[0] = 0x02;
C51 COMPILER V7.50 VX1828_AU 01/17/2006 21:30:46 PAGE 6
shi_sub_write(VX1828,0xC7,0x00,&temp_data[0]);// set TC5 | OEV_MODE[3:0]|-|-|ZOOM_MO
-DE[1:0]|
temp_data[0] =0xCD;
shi_sub_write(VX1828,0x3c,0x00,&temp_data[0]);// set OS9 | HSHIFT |
temp_data[0] =0x03;
shi_sub_write(VX1828,0x3d,0x00,&temp_data[0]);// set OS9 | HSHIFT |
temp_data[0] =0x0c;
shi_sub_write(VX1828,0xc0,0x00,&temp_data[0]);// set OS9 | HSHIFT |
#endif
311 5
312 5 #if AU
313 5 temp_data[0] = 0x02;
314 5 shi_sub_write(VX1828,0xC7,0x00,&temp_data[0]);
315 5 #endif
316 5
317 5 #if 0
temp_data[0] = 0x4B;
shi_sub_write(VX1828,0xD8,0x00,&temp_data[0]);// set TC19 |V_DROP_L3 |V_DROP_L4 |
temp_data[0] = 0x5D;
shi_sub_write(VX1828,0xD7,0x00,&temp_data[0]);// set TC18 |V_DROP_L1 |V_DROP_L2 |
temp_data[0] = 0x05;
shi_sub_write(VX1828,0xD6,0x00,&temp_data[0]);// set TC17 |----|DROP_PER_N|
#endif
325 5
326 5 video_format = 0x00; // setting present Video format .? osd_show(0x0A,0x04,&
-PALN);
327 5 //pal_parameter();
328 5 break;
329 5 case 1: // PAL B
330 5 #if _debug
331 5 printf("the video is PAL-B \n");
332 5 #endif
333 5 //temp_data[0] = hposP_sel; // Address 0x3c
334 5 //temp_data[1] = vposP_sel; // Address 0x3d
335 5 //temp_data[2] = 0x30; // Address 0x3e
336 5 //temp_data[3] = 0x1A; // Address 0x3f
337 5 //temp_data[4] = 0x33; // Address 0x40
338 5 //temp_data[5] = 0x80; // Address 0x41
339 5 //shi_sub_write(VX1828,0x3c,0x05,&temp_data[0]);
340 5 //delay for a while so that to decease no-sync after auto change patten .
341 5 //like as PAL-N TO NTSC .
342 5 DelayXms(0x80);
343 5 #if LG
temp_data[0] = 0x16;
shi_sub_write(VX1828,0xC2,0x00,&temp_data[0]);// set TC6 |-| STV_ON |
temp_data[0] = 0x79;
shi_sub_write(VX1828,0xa6,0x00,&temp_data[0]);
temp_data[0] = 0x00;
shi_sub_write(VX1828,0xa5,0x00,&temp_data[0]);
temp_data[0] = 0x02;
shi_sub_write(VX1828,0xC7,0x00,&temp_data[0]);// set TC5 | OEV_MODE[3:0]|-|-|ZOOM_MO
-DE[1:0]|
temp_data[0] =0xCD;
shi_sub_write(VX1828,0x3c,0x00,&temp_data[0]);// set OS9 | HSHIFT |
temp_data[0] =0x03;
shi_sub_write(VX1828,0x3d,0x00,&temp_data[0]);// set OS9 | HSHIFT |
//temp_data[0] =0x0c;
//shi_sub_write(VX1828,0xc0,0x00,&temp_data[0]);// set OS9 | HSHIFT |
#endif
359 5 #if AU
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