dm9ks.c

DM9000A 网络芯片Linux下的驱动代码,买芯片才搞到的,很实用哦.

	data_ptr = (DATA_TYPE *)skb->data;

	outb(0xf8, db->io_addr); // Write data into SRAM trigger
	db->sent_pkt_len = skb->len;

	tmplen = (skb->len + IO_MODE - 1) / IO_MODE;
	for (i = 0; i < tmplen; i++)
		VALOUT(((DATA_TYPE *)data_ptr)[i], db->io_data);
	
	/* TX control: First packet immediately send, second packet queue*/
	if (db->tx_pkt_cnt < 2)
	{
		/* First packet */
		db->tx_pkt_cnt++;

		/* Set TX length to reg. 0xfc & 0xfd */
		iow(db, 0xfc, (skb->len & 0xff));
		iow(db, 0xfd, (skb->len >> 8) & 0xff);

		/* Issue TX polling command */
		iow(db, DM9KS_TCR, 0x1); /* Cleared after TX complete*/

		/* Saved the time stamp */
		dev->trans_start = jiffies;
	}

	/* Free this SKB */
	dev_kfree_skb(skb);

	/* Re-enable resource check */
	if (db->tx_pkt_cnt < 2)
		netif_wake_queue(dev);
	

	/* Re-enable interrupt */
	iow(db, DM9KS_IMR, DM9KS_REGFF);

	return 0;
}

/*
  Stop the interface.
  The interface is stopped when it is brought.
*/
static int dmfe_stop(struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	DMFE_DBUG(0, "dmfe_stop", 0);

	/* deleted timer */
	del_timer(&db->timer);

	netif_stop_queue(dev); 

	/* free interrupt */
	free_irq(dev->irq, dev);

	/* RESET devie */
	phy_write(db, 0x00, 0x8000);	/* PHY RESET */
	iow(db, DM9KS_GPR, 0x01); 	/* Power-Down PHY */
	iow(db, DM9KS_IMR, DM9KS_DISINTR);	/* Disable all interrupt */
	iow(db, DM9KS_RXCR, 0x00);	/* Disable RX */

	MOD_DEC_USE_COUNT;

	/* Dump Statistic counter */
#if FALSE
	printk("\nRX FIFO OVERFLOW %lx\n", db->stats.rx_fifo_errors);
	printk("RX CRC %lx\n", db->stats.rx_crc_errors);
	printk("RX LEN Err %lx\n", db->stats.rx_length_errors);
	printk("RX LEN < 64byte %x\n", db->runt_length_counter);
	printk("RX LEN > 1514byte %x\n", db->long_length_counter);
	printk("RESET %x\n", db->reset_counter);
	printk("RESET: TX Timeout %x\n", db->reset_tx_timeout);
	printk("RESET: RX Status Wrong %x\n", db->reset_rx_status);
#endif

	return 0;
}

static void dmfe_tx_done(unsigned long unused)
{
	struct net_device *dev = dmfe_dev;
	board_info_t *db = (board_info_t *)dev->priv;
	DMFE_DBUG(0, "dmfe_tx_done()", 0);
	int txends, nsr;

	nsr = ior(db, 0x01);	/* Got TX status */ 
	txends = nsr = (nsr>>2) & 0x03;
	for(;txends; txends>>=1)
	{
		if(txends&1)
			db->tx_pkt_cnt--;
	} // of txends

	if(nsr)	netif_wake_queue(dev);

	return;
}

/*
  DM9102 insterrupt handler
  receive the packet to upper layer, free the transmitted packet
*/
static void dmfe_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
	struct net_device *dev = dev_id;
	board_info_t *db;
	int int_status;
	u8 reg_save;

	DMFE_DBUG(0, "dmfe_interrupt()", 0);

	if (!dev) {
		DMFE_DBUG(1, "dmfe_interrupt() without DEVICE arg", 0);
		return;
	}

	/* A real interrupt coming */
	db = (board_info_t *)dev->priv;
	spin_lock(&db->lock);

	/* Save previous register address */
	reg_save = inb(db->io_addr);

	/* Disable all interrupt */
	iow(db, DM9KS_IMR, DM9KS_DISINTR); 

	/* Got DM9000A/DM9010 interrupt status */
	int_status = ior(db, DM9KS_ISR);		/* Got ISR */
	iow(db, DM9KS_ISR, int_status);		/* Clear ISR status */ 

	/* Received the coming packet */
	if (int_status & DM9KS_RX_INTR) 
		dmfe_packet_receive(dev);

	/* Trnasmit Interrupt check */
	if (int_status & DM9KS_TX_INTR)
		tasklet_schedule(&dmfe_tx_tasklet);

	/* Re-enable interrupt mask */ 
	iow(db, DM9KS_IMR, DM9KS_REGFF);

	
	/* Restore previous register address */
	outb(reg_save, db->io_addr); 

	spin_unlock(&db->lock); 
}

/*
  Get statistics from driver.
*/
static struct net_device_stats * dmfe_get_stats(struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	DMFE_DBUG(0, "dmfe_get_stats", 0);
	return &db->stats;
}

/*
  Process the upper socket ioctl command
*/
static int dmfe_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
{
	DMFE_DBUG(0, "dmfe_do_ioctl()", 0);
	return 0;
}

/*
  A periodic timer routine
  Dynamic media sense, allocated Rx buffer...
*/
static void dmfe_timer(unsigned long data)
{
	struct net_device *dev = (struct net_device *)data;
	board_info_t *db = (board_info_t *)dev->priv;
	u8 reg_save;

	
	DMFE_DBUG(0, "dmfe_timer()", 0);

	/* Save previous register address */
	reg_save = inb(db->io_addr);

	/* TX timeout check */
	if (dev->trans_start&&((jiffies-dev->trans_start)>DMFE_TX_TIMEOUT)) {
		db->device_wait_reset = 1;
		db->reset_tx_timeout++;
	} 

	/* DM9000A/DM9010 dynamic RESET check and do */
	if (db->device_wait_reset) {
		netif_stop_queue(dev); 
		db->reset_counter++;
		db->device_wait_reset = 0;
		dev->trans_start = 0;
		dmfe_init_dm9000(dev);
		netif_wake_queue(dev);
	}

	/* Restore previous register address */
	outb(reg_save, db->io_addr);

	/* Set timer again */
	db->timer.expires = DMFE_TIMER_WUT;
	add_timer(&db->timer);

}

#if !defined(CHECKSUM)
#define check_rx_ready(a)	((a)&0x01)
#else
inline u8 check_rx_ready(u8 rxbyte)
{
	if (!(rxbyte & 0x01))
		return 0;
	return ((rxbyte >> 4) | 0x01);
}
#endif

/*
  Received a packet and pass to upper layer
*/
static void dmfe_packet_receive(struct net_device *dev)
{
	dev = dmfe_dev;
	board_info_t *db = (board_info_t *)dev->priv;
	struct sk_buff *skb;
	u8 rxbyte, val;
	u16 i, GoodPacket, tmplen = 0;

	rx_t rx;

	DATA_TYPE * ptr = (DATA_TYPE*)&rx;
	DATA_TYPE *rdptr;

	DMFE_DBUG(0, "dmfe_packet_receive()", 0);

	do {
		ior(db, 0xf0);			/* Dummy read */
		rxbyte = inb(db->io_data);	/* Got most updated data */

		/* packet ready to receive check */
		if(!(val = check_rx_ready(rxbyte))) break;

		/* A packet ready now  & Get status/length */
		GoodPacket = TRUE;
		outb(0xf2, db->io_addr);

		/* Read packet status & length */
		for (i = 0; i < 4 / IO_MODE; i++)
			*(ptr+i) = VALIN(db->io_data);

		/* Packet status check */
		if (rx.desc.status & 0xbf)
		{
			GoodPacket = FALSE;
			if (rx.desc.status & 0x01) 
			{
				db->stats.rx_fifo_errors++;
				printk("<RX FIFO error>\n");
			}
			if (rx.desc.status & 0x02) 
			{
				db->stats.rx_crc_errors++;
				printk("<RX CRC error>\n");
			}
			if (rx.desc.status & 0x80) 
			{
				db->stats.rx_length_errors++;
				printk("<RX Length error>\n");
			}
			if (rx.desc.status & 0x08)
				printk("<Physical Layer error>\n");
		}

		/* Move data from DM9000 */
		if (db->device_wait_reset) break;

		if (!GoodPacket || (!(skb = dev_alloc_skb(rx.desc.length+4))))
		{
			/* Without buffer or error packet */
			printk("<Without buffer or packet error>\n");
			for (i = 0; i < tmplen; i++)
				VALIN(db->io_data);
			continue;
		}
		

		skb->dev = dev;
		skb_reserve(skb, 2);
		rdptr = (DATA_TYPE *)skb_put(skb, rx.desc.length - 4);
			
		/* Read received packet from RX SARM */
		tmplen = (rx.desc.length + IO_MODE-1) / IO_MODE;
		for ( i = 0 ; i < tmplen; i++)
			(rdptr)[i]=VALIN(db->io_data);
				
		/* Pass to upper layer */
		skb->protocol = eth_type_trans(skb,dev);
#if defined(CHECKSUM)
		if (val == 0x01)
			(struct sk_buff*)skb->ip_summed = CHECKSUM_UNNECESSARY;
#endif
		netif_rx(skb);
		db->stats.rx_packets++;
		db->stats.rx_bytes += rx.desc.length;
			
	}while(rxbyte == DM9KS_PKT_RDY);
	
}

/*
  Read a word data from SROM
*/
static u16 read_srom_word(board_info_t *db, int offset)
{
	iow(db, 0xc, offset);
	iow(db, 0xb, 0x4);
	udelay(200);
	iow(db, 0xb, 0x0);
	return (ior(db, 0xd) + (ior(db, 0xe) << 8) );
}

/*
  Set DM9000A/DM9010 multicast address
*/
static void dm9000_hash_table(struct net_device *dev)
{
	board_info_t *db = (board_info_t *)dev->priv;
	struct dev_mc_list *mcptr = dev->mc_list;
	int mc_cnt = dev->mc_count;
	u32 hash_val;
	u16 i, oft, hash_table[4];

	DMFE_DBUG(0, "dm9000_hash_table()", 0);

	/* Set Node address */
	for (i = 0, oft = 0x10; i < 6; i++, oft++)
		iow(db, oft, dev->dev_addr[i]);

	/* Clear Hash Table */
	for (i = 0; i < 4; i++)
		hash_table[i] = 0x0;

	/* broadcast address */
	hash_table[3] = 0x8000;

	/* the multicast address in Hash Table : 64 bits */
	for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
		hash_val = cal_CRC((char *)mcptr->dmi_addr, 6, 0) & 0x3f; 
		hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
	}

	/* Write the hash table to MAC MD table */
	for (i = 0, oft = 0x16; i < 4; i++) {
		iow(db, oft++, hash_table[i] & 0xff);
		iow(db, oft++, (hash_table[i] >> 8) & 0xff);
	}
}

/*
  Calculate the CRC valude of the Rx packet
  flag = 1 : return the reverse CRC (for the received packet CRC)
         0 : return the normal CRC (for Hash Table index)
*/
static unsigned long cal_CRC(unsigned char * Data, unsigned int Len, u8 flag)
{
	
	u32 crc = ether_crc_le(Len, Data);

	if (flag) 
		return ~crc;
		
	return crc;
	 
}

/*
   Read a byte from I/O port
*/
static u8 ior(board_info_t *db, int reg)
{
	outb(reg, db->io_addr);
	return inb(db->io_data);
}

/*
   Write a byte to I/O port
*/
static void iow(board_info_t *db, int reg, u8 value)
{
	outb(reg, db->io_addr);
	outb(value, db->io_data);
}

/*
   Read a word from phyxcer
*/
static u16 phy_read(board_info_t *db, int reg)
{
	/* Fill the phyxcer register into REG_0C */
	iow(db, 0xc, DM9KS_PHY | reg);

	iow(db, 0xb, 0xc); 	/* Issue phyxcer read command */
	udelay(100);		/* Wait read complete */
	iow(db, 0xb, 0x0); 	/* Clear phyxcer read command */

	/* The read data keeps on REG_0D & REG_0E */
	return ( ior(db, 0xe) << 8 ) | ior(db, 0xd);
}

/*
   Write a word to phyxcer
*/
static void phy_write(board_info_t *db, int reg, u16 value)
{
	/* Fill the phyxcer register into REG_0C */
	iow(db, 0xc, DM9KS_PHY | reg);

	/* Fill the written data into REG_0D & REG_0E */
	iow(db, 0xd, (value & 0xff));
	iow(db, 0xe, ( (value >> 8) & 0xff));

	iow(db, 0xb, 0xa);		/* Issue phyxcer write command */
	udelay(500);			/* Wait write complete */
	iow(db, 0xb, 0x0);		/* Clear phyxcer write command */
}

#ifdef MODULE

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Jackal Huang, [e-mail]");
MODULE_DESCRIPTION("Davicom DM9000A/DM9010 ISA/uP Fast Ethernet Driver");
MODULE_PARM(debug, "i");
MODULE_PARM(mode, "i");

/* Description: 
   when user used insmod to add module, system invoked init_module()
   to initilize and register.
*/
int init_module(void)
{
	DMFE_DBUG(0, "init_module() ", debug);

	if (debug) 
		dmfe_debug = debug;   /* set debug flag */

	switch(mode) {
		case DM9KS_10MHD:
		case DM9KS_100MHD:
		case DM9KS_10MFD:
		case DM9KS_100MFD:
			media_mode = mode;
			break;
		default:
			media_mode = DM9KS_AUTO;
	}

	return dmfe_probe(0);              /* search board and register */
}

/* Description: 
   when user used rmmod to delete module, system invoked clean_module()
   to  un-register DEVICE.
*/
void cleanup_module(void)
{
	board_info_t * db;
	DMFE_DBUG(0, "clean_module()", 0);

	unregister_netdev(dmfe_dev);
	db = (board_info_t *)dmfe_dev->priv;
	release_region(dmfe_dev->base_addr, 2);
	kfree(db);		/* free board information */
	kfree(dmfe_dev);	/* free device structure */
	
	DMFE_DBUG(0, "clean_module() exit", 0);
}
#endif