gpio64x.h

DSP的集成开发

/******************************************************************************\
*      Copyright (C) 2000-2001 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... gpio64x.h
* DATE CREATED.. 05/12/2007
* AUTHOR........ MXD HEU 804 LAB
* LAST MODIFIED. 
* MODIFIER......      
*------------------------------------------------------------------------------
* REGISTERS
*
* GPEN    - GPIO Enable register
* GPDIR   - GPIO Direction register 
* GPVAL   - GPIO Value register 
* GPDH   -  GPIO Delta High register 
* GPHM    - GPIO High Mask register 
* GPDL    - GPIO Delta Low register 
* GPLM    - GPIO Low Mask register 
* GPGC    - GPIO Global Control register 
* GPPOL   - GPIO Interrupt Polarity register 
\*****************************************************************************/
#ifndef _GPIO64x_H_
#define _GPIO64x_H_

/*----------------------------------------------------------------------------*/
/* INCLUDES                                                                   */
/*----------------------------------------------------------------------------*/
#include "regs.h"

/*----------------------------------------------------------------------------*/
/* DEFINES AND MACROS                                                         */
/*----------------------------------------------------------------------------*/

/***************GPIO REGISTERS*******************/

#define GPEN_ADDR    	0x01B00000 
#define GPDIR_ADDR    	0x01B00004 
#define GPVAL_ADDR    	0x01B00008 
#define GPDH_ADDR    	0x01B00010
#define GPHM_ADDR    	0x01B00014 
#define GPDL_ADDR    	0x01B00018  
#define GPLM_ADDR    	0x01B0001C 
#define GPGC_ADDR    	0x01B00020 
#define GPPOL_ADDR    	0x01B00024 

#define GPEN       		  *(volatile unsigned int *)GPEN_ADDR
#define GPDIR      		  *(volatile unsigned int *)GPDIR_ADDR

/* GPIO General Control Register Bitfield */
#define GPINTDV     0
#define LOGIC   	1
#define GPINTPOL 	2
#define GPINT0M	    4
#define GP0M 		5


/* ALL GPIO closed  */
#define GPIO_ALL_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFF0000) )

/******************************************************************************\
*  _ _ _ _ _ _ _ _ _ _ 
* |                   |
* |     G P X E N     |使能寄存器
* |_ _ _ _ _ _ _ _ _ _|
*
* GPEN  - GPIO Enable register
\******************************************************************************/
/***************GPIOx ENABLE*******************/
#define GP0EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFFE) | 1)) 

#define GP1EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFFD) | 2)) 

#define GP2EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFFB) | 4))

#define GP3EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFF7) | 8))

#define GP4EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFEF) | 0x10))

#define GP5EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFDF) | 0x20))

#define GP6EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFFBF) | 0x40))

#define GP7EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFF7F) | 0x80))

#define GP8EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFEFF) | 0x100)) 

#define GP9EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFDFF) | 0x200)) 

#define GP10EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFFBFF) | 0x400))

#define GP11EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFF7FF) | 0x800))

#define GP12EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFEFFF) | 0x1000))

#define GP13EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFDFFF) | 0x2000))

#define GP14EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFFBFFF) | 0x4000))

#define GP15EN_ENABLE() \
        (REG_WRITE(GPEN_ADDR,(REG_READ(GPEN_ADDR) & 0xFFFF7FFF) | 0x8000))

/***************GPIOx DISABLE*******************/
#define GP0EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFFFE) )

#define GP1EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFFFD) )

#define GP2EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFFFB) )

#define GP3EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFF7F) )

#define GP4EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFFEF) )

#define GP5EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFFDF) )

#define GP6EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFFBF) )

#define GP7EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFF7F) )

#define GP8EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFEFF) )

#define GP9EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFDFF) )

#define GP10EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFFBFF) )

#define GP11EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFF7FF) )

#define GP12EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFEFFF) )

#define GP13EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFDFFF) )

#define GP14EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFFBFFF) )

#define GP15EN_DISABLE() \
        ( REG_WRITE(GPEN_ADDR,REG_READ(GPEN_ADDR) & 0xFFFF7FFF) )
//注意：这里还有另外两种方法写，一种是reset_bit和set_bit函数，一种是
//#define INTR_EXT_POLARITY(bit,val) \
//        (val ? SET_BIT(EXTERNAL_INTR_POL_ADDR,bit) : \
//               RESET_BIT(EXTERNAL_INTR_POL_ADDR,bit))
//形式的选择写法
/******************************************************************************\
*  _ _ _ _ _ _ _ _ _ _ 
* |                   |
* |     G P D I R     |方向寄存器
* |_ _ _ _ _ _ _ _ _ _|
*
* GPDIR  - GPIO Direction register
* GPxEN must enable
\******************************************************************************/
/***************GPIOx OUTPUT*******************/
#define GP0DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFFE) | 1)) 

#define GP1DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFFD) | 2))

#define GP2DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFFB) | 4)) 

#define GP3DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFF7) | 8))

#define GP4DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFEF) | 0x10)) 

#define GP5DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFDF) | 0x20))

#define GP6DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFFBF) | 0x40)) 

#define GP7DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFF7F) | 0x80))

#define GP8DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFEFF) | 0x100)) 

#define GP9DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFDFF) | 0x200))

#define GP10DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFFBFF) | 0x400)) 

#define GP11DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFF7FF) | 0x800))

#define GP12DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFEFFF) | 0x1000)) 

#define GP13DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFDFFF) | 0x2000))

#define GP14DIR_OUTPUT() \
        (REG_WRITE(GPDIR_ADDR,(REG_READ(GPDIR_ADDR) & 0xFFFFBFFF) | 0x4000)) 

#define GP15DIR_OUTPUT() \