📄 io.lst
字号:
166 1
167 1 /// P0L.0 - P0L.3 output driver characteristic: strong driver
168 1 /// P0L.4 - P0L.7 output driver characteristic: strong driver
169 1
170 1 /// P0L.0 - P0L.3 output edge characteristic: sharp edge mode
171 1 /// P0L.4 - P0L.7 output edge characteristic: sharp edge mode
172 1
173 1 P0L = 0x0000; // load data register
174 1 POCON0L = 0x0000; // load output control register
175 1 DP0L = 0x0000; // load direction register
176 1
177 1 /// -----------------------------------------------------------------------
178 1 /// Configuration of Port P1H:
179 1 /// -----------------------------------------------------------------------
C166 COMPILER V6.04, IO 08/30/2007 18:29:21 PAGE 4
180 1 /// - no pin of port P1H is used
181 1
182 1 P1H = 0x0000; // load data register
183 1 ALTSEL0P1H = 0x0000; // load alternate output function select
184 1 // register 0
185 1 POCON1H = 0x0000; // load output control register
186 1 DP1H = 0x0000; // load direction register
187 1
188 1 /// -----------------------------------------------------------------------
189 1 /// Configuration of Port P1L:
190 1 /// -----------------------------------------------------------------------
191 1 /// P1L.0 is used as general purpose output
192 1 /// - the pin status is low level
193 1 /// P1L.1 is used as general purpose output
194 1 /// - the pin status is low level
195 1 /// P1L.2 is used as general purpose output
196 1 /// - the pin status is low level
197 1 /// P1L.3 is used as general purpose output
198 1 /// - the pin status is low level
199 1 /// P1L.4 is used as general purpose output
200 1 /// - the pin status is low level
201 1 /// P1L.5 is used as general purpose output
202 1 /// - the pin status is low level
203 1 /// P1L.6 is used as general purpose output
204 1 /// - the pin status is low level
205 1 /// P1L.7 is used as general purpose output
206 1 /// - the pin status is low level
207 1
208 1 /// P1L.0 - P1L.3 output driver characteristic: strong driver
209 1 /// P1L.4 - P1L.7 output driver characteristic: strong driver
210 1
211 1 /// P1L.0 - P1L.3 output edge characteristic: sharp edge mode
212 1 /// P1L.4 - P1L.7 output edge characteristic: sharp edge mode
213 1
214 1 P1L = 0x0000; // load data register
215 1 ALTSEL0P1L = 0x0000; // load alternate output function select
216 1 // register 0
217 1 POCON1L = 0x0000; // load output control register
218 1 DP1L = 0x00FF; // load direction register
219 1
220 1 /// -----------------------------------------------------------------------
221 1 /// Configuration of Port P3:
222 1 /// -----------------------------------------------------------------------
223 1 /// - no pin of port P3 is used
224 1
225 1 ODP3 = 0x0000; // load open-drain register
226 1 P3 = 0x0000; // load data register
227 1 ALTSEL0P3 = 0x0000; // load alternate output function select
228 1 // register 0
229 1 ALTSEL1P3 = 0x0000; // load alternate output function select
230 1 // register 1
231 1 POCON3 = 0x0000; // load output control register
232 1 DP3 = 0x0000; // load direction register
233 1
234 1 /// -----------------------------------------------------------------------
235 1 /// Configuration of Port P4:
236 1 /// -----------------------------------------------------------------------
237 1 /// P4.0 is used as alternate input for the Port Pin (A16)
238 1 /// P4.1 is used as alternate input for the Port Pin (A17)
239 1 /// P4.2 is used as alternate input for the Chip select (CS1_n)
240 1 /// P4.3 is used as alternate input for the Chip select (CS0_n)
241 1
C166 COMPILER V6.04, IO 08/30/2007 18:29:21 PAGE 5
242 1 /// P4.0 - P4.7 threshold type: TTL input
243 1
244 1 /// P4.0 - P4.3 output driver characteristic: strong driver
245 1 /// P4.4 - P4.7 output driver characteristic: strong driver
246 1
247 1 /// P4.0 - P4.3 output edge characteristic: sharp edge mode
248 1 /// P4.4 - P4.7 output edge characteristic: sharp edge mode
249 1
250 1 ODP4 = 0x0000; // load open-drain register
251 1 P4 = 0x0000; // load data register
252 1 ALTSEL0P4 = 0x0000; // load alternate output function select
253 1 // register 0
254 1 ALTSEL1P4 = 0x0000; // load alternate output function select
255 1 // register 1
256 1 POCON4 = 0x0000; // load output control register
257 1 DP4 = 0x0000; // load direction register
258 1
259 1 /// -----------------------------------------------------------------------
260 1 /// Configuration of Port P5:
261 1 /// -----------------------------------------------------------------------
262 1 /// - no pin of port P5 is used
263 1
264 1 P5 = 0x0000; // load data register
265 1
266 1 /// -----------------------------------------------------------------------
267 1 /// Configuration of Port P9:
268 1 /// -----------------------------------------------------------------------
269 1 /// - no pin of port P9 is used
270 1
271 1 ODP9 = 0x0000; // load open-drain register
272 1 P9 = 0x0000; // load data register
273 1 ALTSEL0P9 = 0x0000; // load alternate output function select
274 1 // register 0
275 1 ALTSEL1P9 = 0x0000; // load alternate output function select
276 1 // register 1
277 1 POCON9 = 0x0000; // load output control register
278 1 DP9 = 0x0000; // load direction register
279 1
280 1 /// -----------------------------------------------------------------------
281 1 /// Configuration of Port P20:
282 1 /// -----------------------------------------------------------------------
283 1 /// P20.4 is used as alternate output for the address latch enable signal
284 1 /// (ALE)
285 1
286 1 /// P20.0 - P20.7 threshold type: TTL input
287 1 /// P20.8 - P20.15 threshold type: TTL input
288 1
289 1 /// P20.0 - P20.3 output driver characteristic: strong driver
290 1 /// P20.4 - P20.7 output driver characteristic: strong driver
291 1 /// P20.12 - P20.15 output driver characteristic: strong driver
292 1
293 1 /// P20.0 - P20.3 output edge characteristic: sharp edge mode
294 1 /// P20.4 - P20.7 output edge characteristic: sharp edge mode
295 1 /// P20.12 - P20.15 output edge characteristic: sharp edge mode
296 1
297 1 P20 = 0x0000; // load data register
298 1 POCON20 = 0x0000; // load output control register
299 1 DP20 = 0x0000; // load direction register
300 1
301 1
302 1 // USER CODE BEGIN (IO_Function,3)
303 1
C166 COMPILER V6.04, IO 08/30/2007 18:29:21 PAGE 6
304 1 // USER CODE END
305 1
306 1 } // End of function IO_vInit
307
308
309
310
311 // USER CODE BEGIN (IO_General,10)
312
313 // USER CODE END
314
MODULE INFORMATION: INITIALIZED UNINITIALIZED
CODE SIZE = 170 --------
NEAR-CONST SIZE = -------- --------
FAR-CONST SIZE = -------- --------
HUGE-CONST SIZE = -------- --------
XHUGE-CONST SIZE = -------- --------
NEAR-DATA SIZE = -------- --------
FAR-DATA SIZE = -------- --------
XHUGE-DATA SIZE = -------- --------
IDATA-DATA SIZE = -------- --------
SDATA-DATA SIZE = -------- --------
BDATA-DATA SIZE = -------- --------
HUGE-DATA SIZE = -------- --------
BIT SIZE = -------- --------
INIT'L SIZE = -------- --------
END OF MODULE INFORMATION.
C166 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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