config.h

在Tornado环境下实现的8139网卡芯片的驱动程序

#undef	INCLUDE_PCMCIA		/* include PCMCIA driver */

/* TFFS driver options */

#ifdef	INCLUDE_TFFS
#   define INCLUDE_SHOW_ROUTINES
#endif	/* INCLUDE_TFFS */

/* SCSI driver options */

#undef	INCLUDE_SCSI            /* include SCSI driver */
#undef	INCLUDE_AIC_7880        /* include AIC 7880 SCSI driver */
#undef	INCLUDE_SCSI_BOOT       /* include ability to boot from SCSI */
#undef	INCLUDE_CDROMFS         /* file system to be used */
#undef	INCLUDE_TAPEFS          /* file system to be used */
#undef	INCLUDE_SCSI2           /* select SCSI2 not SCSI1 */

#define INCLUDE_PCI


/* Network driver options */

#define INCLUDE_END             /* Enhanced Network Driver Support */

#undef  INCLUDE_DEC21X40_END    /* (END) DEC 21x4x PCI interface */
#undef  INCLUDE_EL_3C90X_END    /* (END) 3Com Fast EtherLink XL PCI */
#undef  INCLUDE_ELT_3C509_END   /* (END) 3Com EtherLink III interface */
#undef  INCLUDE_ENE_END         /* (END) Eagle/Novell NE2000 interface */
#undef	INCLUDE_FEI_END         /* (END) Intel 8255[7/8/9] PCI interface */
#undef	INCLUDE_GEI8254X_END    /* (END) Intel 82543/82544 PCI interface */
#undef  INCLUDE_LN_97X_END      /* (END) AMD 79C97x PCI interface */
#undef  INCLUDE_ULTRA_END       /* (END) SMC Elite16 Ultra interface */
#undef	INCLUDE_DM_9102_END     /* (END) Davicom 9102A PCI interface */
#define INCLUDE_RTL_81X9_END

#undef  INCLUDE_BSD             /* BSD / Netif Driver Support (Deprecated) */

#undef  INCLUDE_EEX             /* (BSD) Intel EtherExpress interface */
#undef  INCLUDE_EEX32           /* (BSD) Intel EtherExpress flash 32 */
#undef  INCLUDE_ELC             /* (BSD) SMC Elite16 interface */
#undef  INCLUDE_ESMC            /* (BSD) SMC 91c9x Ethernet interface */

/* PCMCIA driver options */

#ifdef  INCLUDE_PCMCIA

#   define INCLUDE_ATA          /* include ATA driver */
#   define INCLUDE_SRAM         /* include SRAM driver */
#   undef INCLUDE_TFFS          /* include TFFS driver */

#   ifdef INCLUDE_NETWORK
#       define INCLUDE_BSD      /* include BSD / Netif Driver Support */
#       define INCLUDE_ELT      /* (BSD) 3Com EtherLink III interface */
#   endif /* INCLUDE_NETWORK */

#endif  /* INCLUDE_PCMCIA */


/* Include PCI support for drivers & libraries that require it. */

#if defined (INCLUDE_LN_97X_END)   || defined (INCLUDE_EL_3C90X_END) || \
    defined (INCLUDE_FEI_END)      || defined (INCLUDE_DEC21X40_END) || \
    defined (INCLUDE_GEI8254X_END) || defined (INCLUDE_AIC_7880)     || \
    defined (INCLUDE_WINDML)       || defined (INCLUDE_USB)			 || \
    defined (INCLUDE_DM_9102_END)  || defined (INCLUDE_RTL_81X9_END)

#   define INCLUDE_PCI

#endif


/* default MMU options and PHYS_MEM_DESC type state constants */

#define INCLUDE_MMU_BASIC       /* bundled MMU support */

#define VM_STATE_MASK_FOR_ALL \
	VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE
#define VM_STATE_FOR_IO \
	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT
#define VM_STATE_FOR_MEM_OS \
	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE
#define VM_STATE_FOR_MEM_APPLICATION \
	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE
#define VM_STATE_FOR_PCI \
	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT


/* default system and auxiliary clock constants
 *
 * Among other things, SYS_CLK_RATE_MAX depends upon the CPU and application
 * work load.  The default value, chosen in order to pass the internal test
 * suite, could go up to PIT_CLOCK.
 */

#define SYS_CLK_RATE_MIN    (19)           /* minimum system clock rate */
#define AUX_CLK_RATE_MIN    (2)            /* minimum auxiliary clock rate */
#define AUX_CLK_RATE_MAX    (8192)         /* maximum auxiliary clock rate */


/* CPU family/type-specific macros and options */

#if	(CPU == I80386) || (CPU == I80486) /* [34]86 specific macros */

/*
 * software floating point emulation support. DO NOT undefine hardware fp
 * support in configAll.h as it is required for software fp emulation.
 */

#define INCLUDE_SW_FP		/* enable emulator if there is no FPU */
#define SYS_CLK_RATE_MAX	(PIT_CLOCK/32) /* max system clock rate */

#ifdef	INCLUDE_TIMESTAMP
#   define INCLUDE_TIMESTAMP_PIT2 /* include PIT2 for timestamp */
#endif	/* INCLUDE_TIMESTAMP */

#elif	(CPU == PENTIUM)	/* P5 specific macros */

#undef	INCLUDE_SW_FP		/* Pentium has hardware FPP */
#undef	USER_D_CACHE_MODE	/* Pentium write-back data cache support */
#define	USER_D_CACHE_MODE	(CACHE_COPYBACK | CACHE_SNOOP_ENABLE)
#undef	INCLUDE_PMC		/* include PMC */
#define SYS_CLK_RATE_MAX	(PIT_CLOCK/32) /* max system clock rate */

#ifdef	INCLUDE_TIMESTAMP	/* select TSC(default) or PIT2 */
#   undef  INCLUDE_TIMESTAMP_PIT2 /* include PIT2 for timestamp */
#   define INCLUDE_TIMESTAMP_TSC  /* include TSC for timestamp */
#   define PENTIUMPRO_TSC_FREQ	0 /* TSC freq, 0 for auto detect */
#endif	/* INCLUDE_TIMESTAMP */

#elif	(CPU == PENTIUM2) || (CPU == PENTIUM3) || (CPU == PENTIUM4) /* P6,P7 */

#undef	INCLUDE_SW_FP		/* Pentium[234] has hardware FPP */
#undef	USER_D_CACHE_MODE	/* Pentium[234] write-back data cache support */
#define	USER_D_CACHE_MODE	(CACHE_COPYBACK | CACHE_SNOOP_ENABLE)
#define	INCLUDE_MTRR_GET	/* get MTRR to sysMtrr[] */
#define	INCLUDE_PMC		/* include PMC */
#undef	VIRTUAL_WIRE_MODE	/* Interrupt Mode: Virtual Wire Mode */
#undef	SYMMETRIC_IO_MODE	/* Interrupt Mode: Symmetric IO Mode */
#define SYS_CLK_RATE_MAX	(PIT_CLOCK/16) /* max system clock rate */

#ifdef	INCLUDE_TIMESTAMP         /* select TSC(default) or PIT2 */
#   undef  INCLUDE_TIMESTAMP_PIT2 /* include PIT2 for timestamp */
#   define INCLUDE_TIMESTAMP_TSC  /* include TSC for timestamp */
#   define PENTIUMPRO_TSC_FREQ	0 /* TSC freq, 0 for auto detect */
#endif	/* INCLUDE_TIMESTAMP */

#define	INCLUDE_MMU_P6_32BIT	/* include 32bit MMU for Pentium[234] */
#ifdef	INCLUDE_MMU_P6_32BIT
#   undef  VM_PAGE_SIZE		/* page size could be 4KB, 4MB */
#   define VM_PAGE_SIZE		PAGE_SIZE_4KB	/* PAGE_SIZE_4MB */
#endif	/* INCLUDE_MMU_P6_32BIT */
#ifdef	INCLUDE_MMU_P6_36BIT
#   undef  VM_PAGE_SIZE		/* page size could be 4KB, 2MB */
#   define VM_PAGE_SIZE		PAGE_SIZE_4KB	/* PAGE_SIZE_2MB */
#endif	/* INCLUDE_MMU_P6_32BIT */

#if	defined (INCLUDE_MMU_P6_32BIT) || defined (INCLUDE_MMU_P6_36BIT) 
#   undef  VM_STATE_MASK_FOR_ALL
#   undef  VM_STATE_FOR_IO
#   undef  VM_STATE_FOR_MEM_OS
#   undef  VM_STATE_FOR_MEM_APPLICATION
#   undef  VM_STATE_FOR_PCI
#   define VM_STATE_MASK_FOR_ALL \
	   VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | \
	   VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_WBACK | VM_STATE_MASK_GLOBAL
#   define VM_STATE_FOR_IO \
	   VM_STATE_VALID | VM_STATE_WRITABLE | \
	   VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT
#   define VM_STATE_FOR_MEM_OS \
	   VM_STATE_VALID | VM_STATE_WRITABLE | \
	   VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT
#   define VM_STATE_FOR_MEM_APPLICATION \
	   VM_STATE_VALID | VM_STATE_WRITABLE | \
	   VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT
#   define VM_STATE_FOR_PCI \
	   VM_STATE_VALID | VM_STATE_WRITABLE | \
	   VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT
#endif	/* defined (INCLUDE_MMU_P6_32BIT) || defined (INCLUDE_MMU_P6_36BIT) */

/* 
 * To enable the IOAPIC, define the mother board from the following list.
 * If the IOAPIC is already enabled, defining the mother board is not 
 * needed.  Related code locates in pciCfgIntStub.c.
 *   D815EEA = Pentium3 + i815e + ICH2(i82801BA)
 *   D850GB  = Pentium4 + i850  + ICH2(i82801BA)
 * The PIRQ[n] is directly handled by IOAPIC in the SYMMETRIC_IO_MODE.
 */

#undef	INCLUDE_D815EEA		/* Pentium3 + i815e + ICH2 */
#undef	INCLUDE_D850GB		/* Pentium4 + i850  + ICH2 */

#if	defined (INCLUDE_D815EEA) || defined (INCLUDE_D850GB)
#   define INCLUDE_ICH2		/* ICH2 IO controller hub */
#else
#   if	(CPU == PENTIUM4)
#       define INCLUDE_ICH3	/* set ICH3 as default */
#   endif /* (CPU == PENTIUM4) */
#endif	/* defined (INCLUDE_D815EEA) || defined (INCLUDE_D850GB) */

#endif	/* (CPU == I80386) || (CPU == I80486) */


#define IO_ADRS_ELC	0x240
#define INT_LVL_ELC	0x0b
#define MEM_ADRS_ELC	0xc8000
#define MEM_SIZE_ELC	0x4000
#define CONFIG_ELC	0	/* 0=EEPROM 1=RJ45+AUI 2=RJ45+BNC */

#define IO_ADRS_ULTRA	0x240
#define INT_LVL_ULTRA	0x0b
#define MEM_ADRS_ULTRA	0xc8000
#define MEM_SIZE_ULTRA	0x4000
#define CONFIG_ULTRA	0	/* 0=EEPROM 1=RJ45+AUI 2=RJ45+BNC */

#define IO_ADRS_EEX	0x240
#define INT_LVL_EEX	0x0b
#define NTFDS_EEX	0x00
#define CONFIG_EEX	0	/* 0=EEPROM  1=AUI  2=BNC  3=RJ45 */
				/* Auto-detect is not supported, so choose */
				/* the right one you're going to use */

#define IO_ADRS_ELT	0x240
#define INT_LVL_ELT	0x0b
#define NRF_ELT		0x00
#define CONFIG_ELT	0	/* 0=EEPROM 1=AUI  2=BNC  3=RJ45 */

#define IO_ADRS_ENE	0x300
#define INT_LVL_ENE	0x05
				/* Hardware jumper is used to set */
				/* RJ45(Twisted Pair) AUI(Thick) BNC(Thin) */

#define IO_ADRS_ESMC	0x300
#define INT_LVL_ESMC	0x0b
#define CONFIG_ESMC	0	/* 0=EEPROM 1=AUI  2=BNC 3=RJ45 */
#define RX_MODE_ESMC	0	/* 0=interrupt level 1=task level */

#ifdef	INCLUDE_EEX32
#   define INCLUDE_EI		/* include 82596 driver */
#   define INT_LVL_EI	0x0b
#   define EI_SYSBUS	0x44	/* 82596 SYSBUS value */
#   define EI_POOL_ADRS	NONE	/* memory allocated from system memory */
#endif	/* INCLUDE_EEX32 */


/*
 * ATA_TYPE <ataTypes[][]> ATA_GEO_FORCE parameters 
 *
 * ATA_TYPE is defined in h/drv/hdisk/ataDrv.h.  The <ataTypes[][]> table
 * is declared in sysLib.c.
 */

/* controller zero device zero */

#define ATA_CTRL0_DRV0_CYL  (761)   /* ATA 0, device 0 cylinders */
#define ATA_CTRL0_DRV0_HDS  (8)     /* ATA 0, device 0 heads */
#define ATA_CTRL0_DRV0_SPT  (39)    /* ATA 0, device 0 sectors per track */
#define ATA_CTRL0_DRV0_BPS  (512)   /* ATA 0, device 0 bytes per sector */
#define ATA_CTRL0_DRV0_WPC  (0xff)  /* ATA 0, device 0 write pre-compensation */