📄 sbq.lst
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206 1 int i;
207 1
208 1 SFRPAGE = CONFIG_PAGE; // Switch to Configuration Page
209 1
210 1 OSCXCN = 0x67; // start external oscillator with
211 1 // 22.1184MHz crystal on TB
212 1
213 1 for (i=0; i <5000; i++) ; // XTLVLD blanking interval (>1ms)
214 1
215 1 while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle
216 1
217 1 RSTSRC = 0x04; // enable missing clock detector reset
218 1
219 1 CLKSEL = 0x01; // change to external crystal
220 1
221 1 OSCICN = 0x00; // disable internal oscillator
222 1
223 1 SFRPAGE = old_SFRPAGE; // restore SFRPAGE
224 1
225 1
226 1
227 1 }
228 #else
void SYSCLK_Init(void)
{
OSCICN = 0x07;
}
#endif
235 //-----------------------------------------------------------------------------
236 // ADC0_Init
C51 COMPILER V7.50 SBQ 05/10/2008 21:16:22 PAGE 5
237 //-----------------------------------------------------------------------------
238 void ADC0_Init (void)
239 {
240 1 char old_SFRPAGE = SFRPAGE;
241 1 int i;
242 1 SFRPAGE = ADC0_PAGE; // Switch to ADC0 Page
243 1
244 1
245 1 ADC0CN = 0x04; // ADC Disabled, Timer3 start-of-conversion
246 1 // track 16 SAR clocks before data conversion
247 1 // upon Timer3 OV. DMA will enable ADC as needed
248 1 //
249 1 REF0CN = 0x03; // turn on bias generator and internal reference.
250 1
251 1 for(i=0;i<10000;i++); // Wait for Vref to settle (large cap used on target board)
252 1 AMX0SL = 0x00; // Single-ended mode
253 1
254 1
255 1 ADC0CF = 0x10; // Select SAR clock frequency =~ 25MHz
256 1
257 1 //ADC0CF = (SYSCLK/25000000) << 4;
258 1 SFRPAGE = old_SFRPAGE; // restore SFRPAGE
259 1
260 1
261 1 }
262
263
264
265 //-----------------------------------------------------------------------------
266 // DMA0_Init
267 //-----------------------------------------------------------------------------
268 void DMA0_Init (void)
269 {
270 1
271 1 char old_SFRPAGE = SFRPAGE;
272 1
273 1 SFRPAGE = DMA0_PAGE; // Switch to DMA0 Page
274 1
275 1 DMA0CN = 0x00; // Disable DMA interface
276 1
277 1 // enable DMA0 couter overflow interrupt
278 1 DMA0CF |=(1 << 3); // DMA0CIE: Repeat Counter OverFlag Interrupt Enable
279 1
280 1
281 1 DMA0DA = XRAM_START_ADD; // Starting Point for XRAM addressing
282 1
283 1 DMA0CT = NUM_SAMPLES; // Get NUM_SAMPLES samples
284 1
285 1 DMA0IPT = 0x00; // Start writing at location 0 instructions address
286 1
287 1 // Push instructions onto stack in order they will be executed
288 1 DMA0IDT = DMA0_GET_ADC0; // DMA to move ADC0 data.
289 1 DMA0IDT = DMA0_END_OF_OP;
290 1
291 1 DMA0BND = 0x00; // Begin instruction executions at address 0
292 1 DMA0CN = 0xA0;
293 1
294 1 EIP2 |= (1 << 7); // enable DMA0 interrupt
295 1 EIE2 |= (1 << 7);
296 1 EA = 1; // enable all interrupts
297 1
298 1 SFRPAGE = old_SFRPAGE; // restore SFRPAGE
C51 COMPILER V7.50 SBQ 05/10/2008 21:16:22 PAGE 6
299 1 // added by wl
300 1
301 1
302 1 }
303
304 //------------------------------------------------------------------------------------
305 // Timer3_Init
306 //------------------------------------------------------------------------------------
307 //
308 // Configure Timer3 to auto-reload and generate ADC sample rate
309 // specified by <counts> using SYSCLK as its time base.
310 //
311 void Timer3_Init (int counts)
312 {
313 1 char old_SFRPAGE = SFRPAGE;
314 1
315 1 SFRPAGE = TMR3_PAGE; // Switch to Timer 3 page
316 1
317 1 TMR3CN = 0x00; // Stop Timer3; Clear TF3;
318 1 TMR3CF = 0x08; // use SYSCLK as timebase
319 1 RCAP3 = -counts; // Init reload values
320 1 TMR3 = 0xffff; // set to reload immediately
321 1 //EIE2 |=(1<<0);
322 1
323 1 TR3 = 1; // start Timer3
324 1 // EA = 1;
325 1 SFRPAGE = old_SFRPAGE; // restore SFRPAGE
326 1
327 1 }
328
329 //-----------------------------------------------------------------------------
330 // EMIF_Init
331 //-----------------------------------------------------------------------------
332 //
333 // Configure the external memory interface to use upper port pins in
334 // non-multiplexed mode to a mixed on-chip/off-chip configuration without
335 // Bank Select.
336 //
337 void EMIF_Init (void)
338 {
339 1 char SFRPAGE_SAVE = SFRPAGE; // Save Current SFR page
340 1
341 1 SFRPAGE = EMI0_PAGE; // Save SFR_PAGE
342 1 EMI0CF = 0x3C; // upper ports; non-muxed mode;
343 1 // split mode w/o bank select
344 1 EMI0TC = 0x45; // timing (7-cycle MOVX)
345 1
346 1 SFRPAGE = CONFIG_PAGE;
347 1
348 1 P4MDOUT |= 0xFF; // all EMIF pins configured as
349 1 P5MDOUT |= 0xFF; // push-pull
350 1 P6MDOUT |= 0xFF;
351 1 P7MDOUT |= 0xFF;
352 1
353 1 SFRPAGE = SFRPAGE_SAVE; // restore SFR_PAGE
354 1
355 1 }
356
357 //-----------------------------------------------------------------------------
358 // SendData
359 //-----------------------------------------------------------------------------
360 //
C51 COMPILER V7.50 SBQ 05/10/2008 21:16:22 PAGE 7
361 //Send data out UART0
362 void SendData(void)
363 {
364 1 unsigned int i;
365 1 unsigned int temp;
366 1 char old_SFRPAGE = SFRPAGE;
367 1
368 1 read_ptr = XRAM_START_ADD;//if(!ReadBuffer(tBuffer,DMA_BLOCK_SIZE)) return;
369 1
370 1 SendChar(0xaa);
371 1 SendChar(0x55);
372 1
373 1 for (i=0; i<DMA_BLOCK_SIZE; i++)
374 1 {
375 2 temp = *(read_ptr + i);
376 2 SendChar((temp>>8)&0xff);//sendbuffer[i+2] = (temp>>8)&0xff;//High Data Byte
377 2 SendChar(temp&0xff); //sendbuffer[i+3] = temp&0xff;//Low Data Byte
378 2 }
379 1 SFRPAGE = old_SFRPAGE;
380 1
381 1 }
382
383 void timer3ISR() interrupt 14
384 {
385 1 TMR3CN &= ~(1<<7);
386 1 }
387 void MDA0Interrupt() interrupt 21 using 1
388 {
389 1 //u16 i;
390 1 char old_SFRPAGE = SFRPAGE;
391 1
392 1 SFRPAGE = DMA0_PAGE; // Switch to DMA0 Page
393 1 DMA0EN = 0; //disable DMA0
394 1 DMA0CN &= ~(1<<6);
395 1 EIE2 &= ~(1 << 7); //disable DMA0 Interrupt
396 1 if( DMA0CI == 1 ) //
397 1 {
398 2
399 2 while(DMA0XBY);
400 2 DMA0HLT = 1;
401 2 DMA0HLT = 0;
402 2 gFulF = 1;
403 2
404 2 }
405 1 DMA0CI = 0; //clear repeat counter overflow flag
406 1 SFRPAGE = old_SFRPAGE;
407 1
408 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 578 ----
CONSTANT SIZE = 3 ----
XDATA SIZE = 2050 8
PDATA SIZE = ---- ----
DATA SIZE = 4 4
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 1 WARNING(S), 0 ERROR(S)
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