csl_intc.h

TMS320DM6446平台下

#ifndef _CSL_INTC_H_
#define _CSL_INTC_H_

#ifdef __cplusplus
extern "C" {
#endif

#include <cslr.h>
#include <csl_error.h>
#include <csl_types.h>
//#include <_csl_intc0.h>
//#include <_csl_intc1.h>

/* Interrupt/Exception Counts */
#define _CSL_INTC_EVENTID__INTC0CNT     (8)      /* ARM exception count */
#define _CSL_INTC_EVENTID__INTC1CNT     (64)     /* Level-1 Interrupt count */

/**
 * @brief   Count of the number of interrupt-events
 */
#define CSL_INTC_EVENTID_CNT        \
    (_CSL_INTC_EVENTID__INTC0CNT + _CSL_INTC_EVENTID__INTC1CNT)

/**
 * @brief   Indicates there is no associated event-handler
 */
#define CSL_INTC_EVTHANDLER_NONE        ((CSL_IntcEventHandlerRecord *) 0)

/**
 * @brief   Invalid handle
 */
#define CSL_INTC_BADHANDLE        (0)


/**
 * @brief   Interrupt Vector IDs
 */
typedef enum {
    CSL_INTC_VECTID_DEFAULT   =   0,  /**< default vector */
    CSL_INTC_VECTID_INVALID   =  -1,  /**< invalid vector */

/* for use only with HookIsr -- by design! */
    CSL_INTC_VECTID_RESET     =   1,  /**< the RESET exception vector */
    CSL_INTC_VECTID_UNDEF     =   2,  /**< the UNDEF exception vector */
    CSL_INTC_VECTID_SWI       =   3,  /**< the SWI exception vector */
    CSL_INTC_VECTID_PREABT    =   4,  /**< the PREABT exception vector */
    CSL_INTC_VECTID_DATABT    =   5,  /**< the DATABT exception vector */
    CSL_INTC_VECTID_IRQ       =   7,  /**< the IRQ exception vector */
    CSL_INTC_VECTID_FIQ       =   8   /**< the FIQ exception vector */

} CSL_IntcVectId;



/**
 * @brief   Interrupt Event IDs
 */
typedef enum {

    _CSL_INTC_EVENTID__SPURIOUS         =   0,
    _CSL_INTC_EVENTID__INTC1START       =   1,

    CSL_INTC_EVENTID_VDINT0           =   _CSL_INTC_EVENTID__INTC1START + 0,  /**< VPSS - CCDC */
    CSL_INTC_EVENTID_VDINT1           =   _CSL_INTC_EVENTID__INTC1START + 1,  /**< VPSS - CCDC */
    CSL_INTC_EVENTID_VDINT2           =   _CSL_INTC_EVENTID__INTC1START + 2,  /**< VPSS - CCDC */
    CSL_INTC_EVENTID_HISTINT          =   _CSL_INTC_EVENTID__INTC1START + 3,  /**< VPSS - Histogram */
    CSL_INTC_EVENTID_H3AINT           =   _CSL_INTC_EVENTID__INTC1START + 4,  /**< VPSS - AE/AWB/AF */
    CSL_INTC_EVENTID_PRVUINT          =   _CSL_INTC_EVENTID__INTC1START + 5,  /**< VPSS - Previewer */
    CSL_INTC_EVENTID_RSZINT           =   _CSL_INTC_EVENTID__INTC1START + 6,  /**< VPSS - Resizer */
    CSL_INTC_EVENTID_VFOCINT          =   _CSL_INTC_EVENTID__INTC1START + 7,  /**< VPSS - Focus */
    CSL_INTC_EVENTID_VENCINT          =   _CSL_INTC_EVENTID__INTC1START + 8,  /**< VPSS - VPBE */
    CSL_INTC_EVENTID_ASQINT           =   _CSL_INTC_EVENTID__INTC1START + 9,  /**< IMCOP - Sqr */
    CSL_INTC_EVENTID_IMXINT           =   _CSL_INTC_EVENTID__INTC1START + 10, /**< IMCOP - iMX */
    CSL_INTC_EVENTID_VLCDINT          =   _CSL_INTC_EVENTID__INTC1START + 11, /**< IMCOP - VLCD */
    CSL_INTC_EVENTID_USBINT           =   _CSL_INTC_EVENTID__INTC1START + 12, /**< USB OTG Collector */
    CSL_INTC_EVENTID_EMACINT          =   _CSL_INTC_EVENTID__INTC1START + 13, /**< CPGMAC Wrapper */
    CSL_INTC_EVENTID_1394INT          =   _CSL_INTC_EVENTID__INTC1START + 14, /**< IEEE1394 */
    CSL_INTC_EVENTID_1394WK           =   _CSL_INTC_EVENTID__INTC1START + 15, /**< IEEE1394WK */
    CSL_INTC_EVENTID_CCINT0           =   _CSL_INTC_EVENTID__INTC1START + 16, /**< 3PCC Region 0 */
    CSL_INTC_EVENTID_CCERRINT         =   _CSL_INTC_EVENTID__INTC1START + 17, /**< 3PCC Error */
    CSL_INTC_EVENTID_TCERRINT0        =   _CSL_INTC_EVENTID__INTC1START + 18, /**< 3PTC0 Error */
    CSL_INTC_EVENTID_TCERRINT1        =   _CSL_INTC_EVENTID__INTC1START + 19, /**< 3PTC1 Error */
    CSL_INTC_EVENTID_PSCINIT          =   _CSL_INTC_EVENTID__INTC1START + 20, /**< PSC-ALLINT */
    CSL_INTC_EVENTID_RSVD21           =   _CSL_INTC_EVENTID__INTC1START + 21, /**< Reserved */
    CSL_INTC_EVENTID_IDEINT           =   _CSL_INTC_EVENTID__INTC1START + 22, /**< ATA/IDE*/
    CSL_INTC_EVENTID_HPIINT           =   _CSL_INTC_EVENTID__INTC1START + 23, /**< UHPI*/
    CSL_INTC_EVENTID_MBXINT           =   _CSL_INTC_EVENTID__INTC1START + 24, /**< McBSP */
    CSL_INTC_EVENTID_MBRINT           =   _CSL_INTC_EVENTID__INTC1START + 25, /**< McBSP */
    CSL_INTC_EVENTID_MMCINT           =   _CSL_INTC_EVENTID__INTC1START + 26, /**< MMC/SD */
    CSL_INTC_EVENTID_SDIOINT          =   _CSL_INTC_EVENTID__INTC1START + 27, /**< MMC/SD */
    CSL_INTC_EVENTID_MSINT            =   _CSL_INTC_EVENTID__INTC1START + 28, /**< Memory Stick */
    CSL_INTC_EVENTID_DDRINT           =   _CSL_INTC_EVENTID__INTC1START + 29, /**< DDR EMIF */
    CSL_INTC_EVENTID_AEMIFINT         =   _CSL_INTC_EVENTID__INTC1START + 30, /**< Async EMIF */
    CSL_INTC_EVENTID_VLQINT           =   _CSL_INTC_EVENTID__INTC1START + 31, /**< VLYNQ */
    CSL_INTC_EVENTID_TINT0            =   _CSL_INTC_EVENTID__INTC1START + 32, /**< Timer 0 - TINT12 */
    CSL_INTC_EVENTID_TINT1            =   _CSL_INTC_EVENTID__INTC1START + 33, /**< Timer 0 - TINT34 */
    CSL_INTC_EVENTID_TINT2            =   _CSL_INTC_EVENTID__INTC1START + 34, /**< Timer 1 - TINT12 */
    CSL_INTC_EVENTID_TINT3            =   _CSL_INTC_EVENTID__INTC1START + 35, /**< Timer 2 - TINT34 */
    CSL_INTC_EVENTID_PWMINT0          =   _CSL_INTC_EVENTID__INTC1START + 36, /**< PWM0 */
    CSL_INTC_EVENTID_PWMINT1          =   _CSL_INTC_EVENTID__INTC1START + 37, /**< PWM1 */
    CSL_INTC_EVENTID_PWMINT2          =   _CSL_INTC_EVENTID__INTC1START + 38, /**< PWM2 */
    CSL_INTC_EVENTID_I2CINT           =   _CSL_INTC_EVENTID__INTC1START + 39, /**< I2C */
    CSL_INTC_EVENTID_UARTINT0         =   _CSL_INTC_EVENTID__INTC1START + 40, /**< UART0 */
    CSL_INTC_EVENTID_UARTINT1         =   _CSL_INTC_EVENTID__INTC1START + 41, /**< UART1 */
    CSL_INTC_EVENTID_UARTINT2         =   _CSL_INTC_EVENTID__INTC1START + 42, /**< UART2 */
    CSL_INTC_EVENTID_SPINT0           =   _CSL_INTC_EVENTID__INTC1START + 43, /**< SPI */
    CSL_INTC_EVENTID_SPINT1           =   _CSL_INTC_EVENTID__INTC1START + 44, /**< SPI */
    CSL_INTC_EVENTID_WDTINT           =   _CSL_INTC_EVENTID__INTC1START + 45, /**< Timer 3 - TINT12 */
    CSL_INTC_EVENTID_DSP2ARM0         =   _CSL_INTC_EVENTID__INTC1START + 46, /**< DSP Controller */
    CSL_INTC_EVENTID_DSP2ARM1         =   _CSL_INTC_EVENTID__INTC1START + 47, /**< DSP Controller */
    CSL_INTC_EVENTID_GPIO0            =   _CSL_INTC_EVENTID__INTC1START + 48, /**< GPIO */
    CSL_INTC_EVENTID_GPIO1            =   _CSL_INTC_EVENTID__INTC1START + 49, /**< GPIO */
    CSL_INTC_EVENTID_GPIO2            =   _CSL_INTC_EVENTID__INTC1START + 50, /**< GPIO */
    CSL_INTC_EVENTID_GPIO3            =   _CSL_INTC_EVENTID__INTC1START + 51, /**< GPIO */
    CSL_INTC_EVENTID_GPIO4            =   _CSL_INTC_EVENTID__INTC1START + 52, /**< GPIO */
    CSL_INTC_EVENTID_GPIO5            =   _CSL_INTC_EVENTID__INTC1START + 53, /**< GPIO */
    CSL_INTC_EVENTID_GPIO6            =   _CSL_INTC_EVENTID__INTC1START + 54, /**< GPIO */
    CSL_INTC_EVENTID_GPIO7            =   _CSL_INTC_EVENTID__INTC1START + 55, /**< GPIO */
    CSL_INTC_EVENTID_GPIOBNK0         =   _CSL_INTC_EVENTID__INTC1START + 56, /**< GPIO */
    CSL_INTC_EVENTID_GPIOBNK1         =   _CSL_INTC_EVENTID__INTC1START + 57, /**< GPIO */
    CSL_INTC_EVENTID_GPIOBNK2         =   _CSL_INTC_EVENTID__INTC1START + 58, /**< GPIO */
    CSL_INTC_EVENTID_GPIOBNK3         =   _CSL_INTC_EVENTID__INTC1START + 59, /**< GPIO */
    CSL_INTC_EVENTID_GPIOBNK4         =   _CSL_INTC_EVENTID__INTC1START + 60, /**< GPIO */
    CSL_INTC_EVENTID_COMMTX           =   _CSL_INTC_EVENTID__INTC1START + 61, /**< ARMSS */
    CSL_INTC_EVENTID_COMMRX           =   _CSL_INTC_EVENTID__INTC1START + 62, /**< ARMSS */
    CSL_INTC_EVENTID_EMUINT           =   _CSL_INTC_EVENTID__INTC1START + 63, /**< E2ICE */

    _CSL_INTC_EVENTID__INTC1END       =   _CSL_INTC_EVENTID__INTC1START + _CSL_INTC_EVENTID__INTC1CNT - 1,


    _CSL_INTC_EVENTID__INTC0START       =   _CSL_INTC_EVENTID__INTC1END + 1,

    CSL_INTC_EVENTID_RESET              =   _CSL_INTC_EVENTID__INTC0START + 0,  /**< the RESET exception vector */
    CSL_INTC_EVENTID_UNDEF              =   _CSL_INTC_EVENTID__INTC0START + 1,  /**< the UNDEF exception vector */
    CSL_INTC_EVENTID_SWI                =   _CSL_INTC_EVENTID__INTC0START + 2,  /**< the SWI exception vector */
    CSL_INTC_EVENTID_PREABT             =   _CSL_INTC_EVENTID__INTC0START + 3,  /**< the PREABT exception vector */
    CSL_INTC_EVENTID_DATABT             =   _CSL_INTC_EVENTID__INTC0START + 4,  /**< the DATABT exception vector */
    CSL_INTC_EVENTID_IRQ                =   _CSL_INTC_EVENTID__INTC0START + 6,  /**< the IRQ exception vector */
    CSL_INTC_EVENTID_FIQ                =   _CSL_INTC_EVENTID__INTC0START + 7,  /**< the FIQ exception vector */

    _CSL_INTC_EVENTID__INTC0END         =   _CSL_INTC_EVENTID__INTC0START + _CSL_INTC_EVENTID__INTC0CNT - 1,

    CSL_INTC_EVENTID_INVALID            =   -1                                  /**< Invalid Event-ID */

} CSL_IntcEventId;


/**
 * @brief   Interrupt Priority
 */
typedef enum {
    
    CSL_INTC_PRIORITY_DEFAULT   = 0,  /**< Default priority */
    _CSL_INTC_PRIORITY__INTC1START     = 0,
    CSL_INTC_PRIORITY_0         = 0 ,  /**< Priority 0 (FIQ, Highest) */
    CSL_INTC_PRIORITY_1         = 1 ,  /**< Priority 1 (FIQ, Lowest) */
    CSL_INTC_PRIORITY_2         = 2 ,  /**< Priority 2 (IRQ, Highest) */
    CSL_INTC_PRIORITY_3         = 3 ,  /**< Priority 3 (IRQ) */
    CSL_INTC_PRIORITY_4         = 4 ,  /**< Priority 4 (IRQ) */
    CSL_INTC_PRIORITY_5         = 5 ,  /**< Priority 5 (IRQ) */
    CSL_INTC_PRIORITY_6         = 6 ,  /**< Priority 6 (IRQ) */
    CSL_INTC_PRIORITY_7         = 7 ,  /**< Priority 7 (IRQ, Lowest) */
    _CSL_INTC_PRIORITY__INTC1END       = 7,

    CSL_INTC_PRIORITY_INVALID    =   -1        /**< Invalid Priority */

} CSL_IntcPriority;


/**
 * @brief   Interrupt Type (Routing)
 */
typedef enum {
    CSL_INTC_TYPE_IRQ   = 0,    /**< IRQ -- normal interrupt request */
    CSL_INTC_TYPE_FIQ   = 1     /**< FIQ -- fast interrupt request */
} CSL_IntcType;


/**
 * @brief   Enumeration of the control commands
 *
 * These are the control commands that could be used with
 * CSL_intcHwControl(..). Some of the commands expect an
 * argument as documented along-side the description of
 * the command.
 */
typedef enum {
    CSL_INTC_CMD_EVTENABLE,
        /**<
         * @brief   Enables the event
         * @param   None
         */
    CSL_INTC_CMD_EVTDISABLE,
        /**<
         * @brief   Disables the event
         * @param   None
         */
    CSL_INTC_CMD_SETPRIORITY,
        /**<
         * @brief   Modifies the interrupt priority
         * @param   CSL_IntcPriority
         */
    CSL_INTC_CMD_SETPACE
        /**<
         * @brief   Not Supported
         * @param   Not Applicable
         */
} CSL_IntcHwControlCmd;


/**
 * @brief   Enumeration of the queries
 *
 * These are the queries that could be used with CSL_intcGetHwStatus(..).
 * The queries return a value through the object pointed to by the pointer
 * that it takes as an argument. The argument supported by the query is
 * documented along-side the description of the query.
 */
typedef enum {
    CSL_INTC_QUERY_PRIORITY,
        /**<
         * @brief   Retrieves the interrupt priority
         * @param   (CSL_IntcPriority *)
         */

    CSL_INTC_QUERY_TYPE,
        /**<
         * @brief   Returns the type (route)
         * @param   (CSL_IntcType *)
         */

    CSL_INTC_QUERY_ISEVENTPENDING
        /**<
         * @brief   Checks if event is pending
         * @param   (Bool *)
         */

} CSL_IntcHwStatusQuery;




/**
 * @brief   Event Handler pointer
 *
 * Event handlers ought to conform to this type
 */
typedef void (* CSL_IntcEventHandler)(void *);


/**
 * @brief   Event Handler Record
 *
 * Used to set-up the event-handler using CSL_intcPlugEventHandler(..)
 */
typedef struct CSL_IntcEventHandlerRecord {
    CSL_IntcEventHandler    handler;    /**< pointer to the event handler */
    void *                  arg;        /**< the argument to be passed to the
                                          handler when it is invoked */
    CSL_IntcEventId         evtId;      /**< event Id */
    Uint32                  dummy;      /**< dummy to fill 16 byte size entry */
    /* Note: This structure should be of size 16 bytes */
} CSL_IntcEventHandlerRecord;


/**
 * @brief   The setup-structure
 *
 * Used to configure the interrupt controller for an event using
 * CSL_intcHwSetup(..)
 */
typedef struct CSL_IntcHwSetup {
    CSL_IntcPriority    priority;   /**< The interrupt priority */
} CSL_IntcHwSetup;



/**
 * @brief   Default values for the setup-parameters
 */
#define CSL_INTC_HWSETUP_DEFAULTS {                 \
    (CSL_IntcPriority) CSL_INTC_PRIORITY_DEFAULT   \
}



/**
 * @brief   Event enable state
 */
typedef Uint8 CSL_IntcEventEnableState;


/**
 * @brief   Global Interrupt enable state
 */
typedef Uint8 CSL_IntcGlobalEnableState;


/**
 * @brief   The interrupt handle object
 *
 * This object is used refenced by the handle to identify the event.
 */
typedef struct CSL_IntcObj {
    CSL_IntcEventId eventId;    /**< The event-id */
    CSL_IntcVectId  vectId;     /**< The vector-id */
    CSL_IntcPriority  priority; /**< The priority level */
    void *          reserved;   /**< Reserved for the future */
} CSL_IntcObj;


/**
 * @brief   The interrupt handle
 *
 * This is returned by the CSL_intcOpen(..) API. The handle is used
 * to identify the event of interest in all INTC calls.
 */
typedef struct CSL_IntcObj *    CSL_IntcHandle;




/**
 * @brief   Intialize INTC module
 *
 * This API performs any module-specific initialization. CSL_intcInit(..)
 * must be invoked before calling any other API in the INTC module.
 *
 * @b Example:
 * @verbatim
      CSL_sysInit( );
      if (CSL_intcInit( ) != CSL_SOK) {
        // module initialization failed! //
      }
  
   @endverbatim
 *
 * @return  CSL_SOK on success
*/

CSL_Status
    CSL_intcInit (
        void
);



/**
 * @brief   Allocates an event for use
 *
 * The API would reserve an interrupt-event for use. It returns
 * a valid handle to the event only if the event is not currently
 * allocated. The user could release the event after use by calling
 * CSL_intcClose(..). The CSL-object ('intcObj') that the user
 * passes would be used to store information pertaining handle.
 *
 * @b Example:
 * @verbatim
        CSL_IntcObj     intcObj;
        CSL_IntcHandle  hIntc;
        CSL_Status      openStatus;
  
        hIntc = CSL_intcOpen(&intcObj, CSL_INTC_EVENTID_TIMER3,
                    CSL_INTC_VECTID_DEFAULT, NULL, &openStatus);
        if (openStatus != CSL_SOK) {
            // open failed //
        }
   @endverbatim
 *
 * @return  Handle identifying the event
 */

CSL_IntcHandle
    CSL_intcOpen (
        CSL_IntcObj *       intcObj,    /**< pointer to the CSL-object allocated by the user */
        CSL_IntcEventId     eventId,    /**< the event-id of the interrupt */
        CSL_IntcVectId      vectId,     /**< the interrupt-vector */
        CSL_IntcHwSetup *   setup,      /**< (optional) pointer to an optional setup-structure */
        CSL_Status *        status      /**< (optional) pointer to a variable that would receive the status */
);