uart.c

uart全功能实现.实现如下函数: U_Open, U_Close, U_GetBytes, U_PutBytes, U_GetBytesAvail, U_GetTxRoomL

   U_Purge(port, TX_BUF);/*clear sw TX FIFO*/
}

void U_SetOwner (UART_PORT port, kal_uint8 owner)
{
   #ifndef __PRODUCTION_RELEASE__
   kal_prompt_trace(MOD_UART1_HISR,"port: %d, owner: %d", port, owner);
   #endif   
   UARTPort[port].ownerid = owner;
}

module_type U_GetOwnerID(UART_PORT port)
{
	return UARTPort[port].ownerid;
}

void U_ConfigEscape (UART_PORT port, kal_uint8 EscChar, kal_uint16 ESCGuardtime)
{
   UARTPort[port].ESCDet.EscChar = EscChar;
   UARTPort[port].ESCDet.GuardTime = ESCGuardtime;
   if (UARTPort[port].ESCDet.GuardTime)
   {
      UARTPort[port].Rec_state = UART_RecNormal;
      GPTI_StartItem(UARTPort[port].handle,
                     (UARTPort[port].ESCDet.GuardTime/10),
                     UART_Calback,
                     &UARTPort[port]);
   }
}

void U_SetFlowCtrl(UART_PORT port, kal_bool XON)    {}   /*NULL for all*/
void U_CtrlDCD(UART_PORT port, IO_level SDCD)   {}   /*NULL for DCE*/
void U_CtrlRI (UART_PORT port, IO_level SRI)    {}   /*NULL for DCE*/
void U_CtrlDTR (UART_PORT port, IO_level SDTR)
{
   kal_uint32 UART_BASE = UART_BaseAddr[port];
   if (SDTR)
      DRV_Reg(UART_MCR(UART_BASE)) |= UART_MCR_DTR;
   else
      DRV_Reg(UART_MCR(UART_BASE)) &= ~UART_MCR_DTR;
}
void U_ReadHWStatus(UART_PORT port, IO_level *SDSR, IO_level *SCTS)
{
   kal_uint16 MSR;
   kal_uint32 UART_BASE = UART_BaseAddr[port];
   MSR = DRV_Reg(UART_MSR(UART_BASE));
   *SDSR = (IO_level)(( MSR & UART_MSR_DSR) >> 5);
   *SCTS = (IO_level)(( MSR & UART_MSR_CTS) >> 4);
}

void U_CtrlBreak(UART_PORT port, IO_level SBREAK)
{
   kal_uint32 UART_BASE = UART_BaseAddr[port];

   if (SBREAK == io_high)
      DRV_Reg(UART_LCR(UART_BASE)) |= UART_LCR_BREAK;
   else
      DRV_Reg(UART_LCR(UART_BASE)) &= ~UART_LCR_BREAK;
}

kal_uint16 U_GetBytes(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length, kal_uint8 *status, module_type ownerid)
{
   kal_uint16  real_count,index;
   kal_uint16   data_count=0;
	EXT_ASSERT( (UARTPort[port].ownerid == ownerid), (kal_uint32)port, (kal_uint32)ownerid,  (kal_uint32)UARTPort[port].ownerid);
	
   if (status != NULL)
      *status = 0;

   DisableRxIntr(UART_BaseAddr[port]);
   if (status != NULL)
   {
      if (UARTPort[port].EscFound)
      {
         *status |= UART_STAT_EscDet;
         UARTPort[port].EscFound = KAL_FALSE;
      }
      if (UARTPort[port].breakDet)
      {
         *status |= UART_STAT_Break;
         UARTPort[port].breakDet = KAL_FALSE;
      }
   }

   EnableRxIntr(UART_BaseAddr[port]);
   do
   {
      Buf_GetBytesAvail(&(UARTPort[port].Rx_Buffer),real_count);
                  
      if( (stack_query_boot_mode()== FACTORY_BOOT && UARTPort[port].DCB.flowControl==fc_sw)||
          (uart_support_autoescape()==KAL_FALSE&& UARTPort[port].DCB.flowControl==fc_sw ))
      {  
         for (index = 0; (index < real_count)&& (data_count<Length) ; index++)
         {
            Buf_Pop(&(UARTPort[port].Rx_Buffer),*(Buffaddr+data_count));           
            /*The following are for software flow control*/
            if(uart_escape_state==0)
            {
               if(*(Buffaddr+data_count)==0x77)
               {
                  uart_escape_state=0x77;               
               }   
               else   
               {
                  data_count++;
               }   
            }  
            else if (uart_escape_state==0x77)
            {
               switch(*(Buffaddr+data_count))
               {
                  case 0x01:
                     *(Buffaddr+data_count)=UARTPort[port].DCB.xonChar;
                     data_count++;
                     break;
                  case 0x02:                  
                     *(Buffaddr+data_count)=UARTPort[port].DCB.xoffChar; 
                     data_count++;                 
                     break;               
                  case 0x03:                  
                     *(Buffaddr+data_count)=0x77;
                     data_count++;
                     break;      
                  default:                  
                     break;      
               }                         
               uart_escape_state=0x0;        
            }                          
         }   
      }
      else/*HW flow control*/
      {
         for (index = 0; (index < real_count)&& (data_count<Length) ; index++)
         {
            Buf_Pop(&(UARTPort[port].Rx_Buffer),*(Buffaddr+data_count));                             
            data_count++;
         }   
      }   
      //}      
      /*satisfy uart owner request, so break*/
      if (data_count == Length) break;            
      /* disable interrupt*/
      DisableRxIntr(UART_BaseAddr[port]);
      Buf_GetBytesAvail(&(UARTPort[port].Rx_Buffer),real_count);
      
       /*there is no data in ringbuffer, so break*/       
      if (real_count==0)
      {
        send_Rxilm[port] = KAL_TRUE;  
        EnableRxIntr(UART_BaseAddr[port]); 
        /* enable interrupt*/
        break;
      }
      EnableRxIntr(UART_BaseAddr[port]);
      /* enable interrupt*/
   }while(KAL_TRUE);        
   
   return data_count;
}

#ifdef DRV_DEBUG
kal_uint16 BMT_PutBytes(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length)
{
   kal_uint16  real_count,index;

   if (UARTPort[port].sleep_on_tx == uart_sleep_on_tx_forbid)
   {
      switch(port)
      {
         case uart_port1:
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART1,PDN_UART1);
            break;
         case uart_port2:
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART2,PDN_UART2);
            break;
   #ifdef __UART3_SUPPORT__
         case uart_port3:
            #if ( (!defined(MT6217)) && (!defined(MT6218B)) )                        
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART3,PDN_UART3);
            #endif
            break;
   #endif   /*__UART3_SUPPORT__*/
         default:
            ASSERT(0);
            break;
      }
   }

   Buf_GetRoomLeft(&(UARTPort[port].Tx_Buffer),real_count);
   if (real_count > Length)
   {
      real_count = Length;
   }
   else
   {
      send_Txilm[port] = KAL_TRUE;
   }

   for (index = 0; index < real_count; index++)
   {
      Buf_Push(&(UARTPort[port].Tx_Buffer),*(Buffaddr+index));
   }

   switch(port)
   {
      case uart_port1:
         EnableTxIntr(UART_BaseAddr[port]);
         break;
      case uart_port2:
         #if ( (defined(MT6205)) || (defined(MT6205B)) )
               if ((DMA1_CheckITStat())||(DMA1_CheckRunStat()))
               {
                  ;
               }
               else
               {
                  EnableTxIntr(UART_BaseAddr[port]);
               }
         #endif   /*(MT6205,MT6205B)*/
         #if ( (defined(MT6208)) || (defined(FPGA)) )
               EnableTxIntr(UART_BaseAddr[port]);
         #endif   /*(MT6208,FPGA)*/

         #if ( (defined(MT6218))||defined(MT6226M) || (defined(MT6218B)) || (defined(MT6219)) ||(defined(MT6217))||(defined(MT6228))|| defined(MT6229)|| (defined(MT6226))|| (defined(MT6227)) )
            if ((DMA_CheckITStat(uart2_dmaport))||(DMA_CheckRunStat(uart2_dmaport)))
            {
               ;
            }
            else
            {
               EnableTxIntr(UART_BaseAddr[port]);
            }
         #endif   /*MT6218*/
         break;
#ifdef __UART3_SUPPORT__
      case uart_port3:
         EnableTxIntr(UART_BaseAddr[port]);
         break;
#endif   /*__UART3_SUPPORT__*/
      default:
         ASSERT(0);
         break;
   }

   return real_count;
}
#endif   /*DRV_DEBUG*/
kal_uint16 U_PutBytes(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length, module_type ownerid )
{
#ifndef DRV_DEBUG
   kal_uint16  real_count,index;
   kal_uint32  savedMask;

	EXT_ASSERT( (UARTPort[port].ownerid == ownerid), (kal_uint32) ownerid,  (kal_uint32)port, (kal_uint32)UARTPort[port].ownerid);
   if(UARTPort[port].EnableTX == KAL_FALSE)
   {
   	return Length;
   }

   if (UARTPort[port].sleep_on_tx == uart_sleep_on_tx_forbid)
   {
      switch(port)
      {
         case uart_port1:
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART1,PDN_UART1);
            break;
         case uart_port2:
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART2,PDN_UART2);
            break;
   #ifdef __UART3_SUPPORT__
         case uart_port3:
            #if ( (!defined(MT6217)) && (!defined(MT6218B)) )              
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART3,PDN_UART3);
            #endif      
            break;
   #endif   /*__UART3_SUPPORT__*/
         default:
            ASSERT(0);
            break;
      }
   }
   
   Buf_GetRoomLeft(&(UARTPort[port].Tx_Buffer),real_count);
   if (real_count >= Length)
   {
      real_count = Length;
   }
   else
   {
      send_Txilm[port] = KAL_TRUE;
   }

   for (index = 0; index < real_count; index++)
   {
      Buf_Push(&(UARTPort[port].Tx_Buffer),*(Buffaddr+index));
   }

   switch(port)
   {
      case uart_port1:
         EnableTxIntr(UART_BaseAddr[port]);
         break;
      case uart_port2:
         #if ( (defined(MT6218))||defined(MT6226M) || (defined(MT6218B)) || (defined(MT6219)) ||(defined(MT6217))||(defined(MT6228))|| defined(MT6229)|| (defined(MT6226))|| (defined(MT6227)) )
            savedMask = SaveAndSetIRQMask();
            if (UART2_Intr_is_Running == KAL_TRUE)
            {
               ;
            }
            else
            {
               EnableTxIntr(UART_BaseAddr[port]);
            }
            RestoreIRQMask(savedMask);
         #endif   /*MT6218*/
         #if ( (defined(MT6205)) || (defined(MT6205B)) )
            savedMask = SaveAndSetIRQMask();
            if ((DMA1_CheckITStat())||(DMA1_CheckRunStat()))
            {
               ;
            }
            else
            {
               EnableTxIntr(UART_BaseAddr[port]);
            }
            RestoreIRQMask(savedMask);
         #endif   /*(MT6205,MT6205B)*/
         #if ( (defined(MT6208)) || (defined(FPGA)) )
            EnableTxIntr(UART_BaseAddr[port]);
         #endif   /*(MT6208,FPGA)*/
         break;
#ifdef __UART3_SUPPORT__
      case uart_port3:
         EnableTxIntr(UART_BaseAddr[port]);
         break;
#endif   /*__UART3_SUPPORT__*/
      default:
         ASSERT(0);
         break;
   }
   return real_count;
#else /*DRV_DEBUG*/
   return Length;
#endif /*DRV_DEBUG*/
}

#ifndef __PRODUCTION_RELEASE__
#ifdef __MTK_TARGET__
#pragma arm section code = "INTERNCODE"
#endif /* __MTK_TARGET__ */
#endif   /*__PRODUCTION_RELEASE__*/
#ifndef __ROMSA_SUPPORT__ /* Note: for ROM code */
kal_uint16 U_PutISRBytes(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length, module_type ownerid)
{
#ifndef DRV_DEBUG
   kal_uint16  real_count,index;

   EXT_ASSERT( (UARTPort[port].ownerid == ownerid), (kal_uint32) ownerid, (kal_uint32)port, (kal_uint32)UARTPort[port].ownerid);
   if (UARTPort[port].sleep_on_tx == uart_sleep_on_tx_forbid)
   {
      switch(port)
      {
         case uart_port1:
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART1,PDN_UART1);
            break;
         case uart_port2:
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART2,PDN_UART2);
            break;
   #ifdef __UART3_SUPPORT__
         case uart_port3:
            #if ( (!defined(MT6217)) && (!defined(MT6218B)) )              
            DRVPDN_Disable(DRVPDN_CON1,DRVPDN_CON1_UART3,PDN_UART3);
            #endif
            break;
   #endif   /*__UART3_SUPPORT__*/
         default:
            ASSERT(0);
            break;
      }
   }
   if(UARTPort[port].EnableTX == KAL_FALSE)
   {
   	return Length;
   }

   Buf_GetRoomLeft(&(UARTPort[port].Tx_Buffer_ISR),real_count);
   if (real_count > Length)
   {
      real_count = Length;
   }

   for (index = 0; index < real_count; index++)
   {
      Buf_Push(&(UARTPort[port].Tx_Buffer_ISR),*(Buffaddr+index));
   }

   switch(port)
   {
      case uart_port1:
         EnableTxIntr(UART_BaseAddr[port]);
         break;
      case uart_port2:
         #if ( (defined(MT6205)) || (defined(MT6205B)) )
            if ((DMA1_CheckITStat())||(DMA1_CheckRunStat())||(UART2_Intr_is_Running == KAL_TRUE) )
            {
               ;
            }
            else
            {
               EnableTxIntr(UART_BaseAddr[port]);
            }
         #endif /*(MT6205,MT6205B)*/

         #if ( (defined(MT6208)) || (defined(FPGA)) )
            EnableTxIntr(UART_BaseAddr[port]);
         #endif   /*(MT6208,FPGA)*/

         #if ( (defined(MT6218))||defined(MT6226M) || (defined(MT6218B)) || (defined(MT6219)) ||(defined(MT6217))||(defined(MT6228))|| defined(MT6229)|| (defined(MT6226))|| (defined(MT6227)) )
            if (UART2_Intr_is_Running == KAL_TRUE)
            {
               ;
            }
            else
            {
               EnableTxIntr(UART_BaseAddr[port]);
            }
         #endif   /*MT6218*/
         break;
#ifdef __UART3_SUPPORT__
      case uart_port3:
         break;
#endif   /*__UART3_SUPPORT__*/
      default:
         ASSERT(0);
         break;
   }
   return real_count;
#else /*DRV_DEBUG*/
   return Length;
#endif /*DRV_DEBUG*/
}
#endif /* Note: for ROM code */

kal_uint16 U_SendISRData(UART_PORT port, kal_uint8 *Buffaddr, kal_uint16 Length,kal_uint8 mode, kal_uint8 escape_char, module_type ownerid)
{
#ifndef DRV_DEBUG
    kal_int32  real_count,index, data_co