io_main.c

用 Hitex 工具软件开发 stm32 的例子

/********************************************************************
 * Project:    Tasking-STM32-Stick
 * File:       io_main.c
 *
 * System:     Cortex ARMv7 32 Bit (STM32FRT)
 * Compiler:   Tasking Altuim VX Toolchain v2.01
 *
 * Date:       2007-08-20
 * Author:     [e-mail]
 *
 * Rights:     Hitex Development Tools GmbH
 *             Greschbachstr. 12
 *             D-76229 Karlsruhe
 ********************************************************************
 * Description:
 *
 * This file is part of the Tasking Example chain
 * The code is based on usage of the STmicro library functions
 * This is a small implementation of different features
 * The application runs in ARM mode with high optimization level.
 *
 ********************************************************************
 * History:
 *
 *    Revision 1.0    2007/08/20      Gx
 *    Initial revision
 ********************************************************************
 * This is a preliminary version.
 *
 * WARRANTY:  HITEX warrants that the media on which the SOFTWARE is
 * furnished is free from defects in materials and workmanship under
 * normal use and service for a period of ninety (90) days. HITEX entire
 * liability and your exclusive remedy shall be the replacement of the
 * SOFTWARE if the media is defective. This Warranty is void if failure
 * of the media resulted from unauthorized modification, accident, abuse,
 * or misapplication.
 *
 * DISCLAIMER:  OTHER THAN THE ABOVE WARRANTY, THE SOFTWARE IS FURNISHED
 * "AS IS" WITHOUT WARRANTY OF ANY KIND. HITEX DISCLAIMS ALL OTHER WARRANTIES,
 * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 *
 * NEITHER HITEX NOR ITS AFFILIATES SHALL BE LIABLE FOR ANY DAMAGES ARISING
 * OUT OF THE USE OF OR INABILITY TO USE THE SOFTWARE, INCLUDING DAMAGES FOR
 * LOSS OF PROFITS, BUSINESS INTERRUPTION, OR ANY SPECIAL, INCIDENTAL, INDIRECT
 * OR CONSEQUENTIAL DAMAGES EVEN IF HITEX HAS BEEN ADVISED OF THE POSSIBILITY
 * OF SUCH DAMAGES.
 ********************************************************************/
#include "stm32f10x_lib.h"
#include "system.h"

u32 tempreg = 0;

u8  IO_config_A[8],
    IO_config_B[8],
    IO_config_C[8],
    IO_config_D[8],
    ACTIV_IO_config_A[8] = {0,0,0,0,0,0,0,0},           /* containing configuration data */
    ACTIV_IO_config_B[8] = {0,0,0,0,0,0,0,0},           /* containing configuration data */
    ACTIV_IO_config_C[8] = {0,0,0,0,0,0,0,0},           /* containing configuration data */
    ACTIV_IO_config_D[8] = {0,0,0,0,0,0,0,0},           /* containing configuration data */
    Port_In[7],
    Port_Out[7],
    ACTIVE_ExtInt_Cfg[4] = {0,0,0,0},
    ACTIVE_Alternate[6] = {0,0,0,0};

u8 adc_init_done = 0x00;
u16 LastADValue;

u8 temp_tst[4];


void IO_Configuration_B(void)
{
   /**IO Configuration for PortB*/
   u8 i;
   
   /* reseting Pins */
   GPIOB->CRL &= ~0xFFF00FFF; 
   GPIOB->CRH &= ~0xFFFF0000;
  
  
   tempreg = IO_config_B[0] | (u32)(IO_config_B[1]<<8) | (u32)(IO_config_B[2]<<16) | (u32)(IO_config_B[3]<<24);
   tempreg &= 0xFFF00FFF; 
   GPIOB->CRL |= tempreg;
   
   tempreg &= 0xFFFF0000;
   tempreg = IO_config_B[4] | (u32)(IO_config_B[5]<<8) | (u32)(IO_config_B[6]<<16) | (u32)(IO_config_B[7]<<24);
   
   GPIOB->CRH |= tempreg;
   
   for(i = 0;i < 8;i++)
   {
      if((IO_config_B[i] & 0x03) == 0x00)
      {
         if((IO_config_B[i] & 0x0C) == 0x08)
         {
                           
            GPIOB->ODR  = (GPIOB->ODR & ~(0x01 << i*2))  | (0x01 << i*2);   
         }  
         else
         {
            GPIOB->ODR  = (GPIOB->ODR & ~(0x01 << i*2));
         }
      }
      if((IO_config_B[i] & 0x30) == 0x00)
      {
         if((IO_config_B[i] & 0xC0) == 0x80)
         {
             GPIOB->ODR  = (GPIOB->ODR & ~(0x02 << i*2))  | (0x02 << i*2);   
         }
         else
         {
            GPIOB->ODR  = (GPIOB->ODR & ~(0x02 << i*2));
         }
      }          
   }   
   
}


void Get_IO_Configuration_B(void)
{
   u8 i;
   
   /**Get IO Configuration for PortB*/
   ACTIV_IO_config_B[0] = (u8)GPIOB->CRL;
   ACTIV_IO_config_B[1] = (GPIOB->CRL >> 8) & 0x0F;
   ACTIV_IO_config_B[2] = (GPIOB->CRL >> 16) & 0xF0;
   ACTIV_IO_config_B[3] = (u8)(GPIOB->CRL >> 24);
   ACTIV_IO_config_B[4] = GPIOB->CRH & 0x00;
   ACTIV_IO_config_B[5] = (GPIOB->CRH >> 8) & 0x00; 
   ACTIV_IO_config_B[6] = (u8)(GPIOB->CRH >> 16);
   ACTIV_IO_config_B[7] = (u8)(GPIOB->CRH >> 24);

   
   for(i = 0;i < 8;i++)
   {
      if((ACTIV_IO_config_B[i] & 0x03) > 0x01)
      {
         ACTIV_IO_config_B[i] &= 0xFD;    /*only for GUI*/
      }
      else
      {
         if((ACTIV_IO_config_B[i] & 0x0C) == 0x08)
         {
            if((GPIOB->ODR & (0x01 << i*2)) == 0x00)
            {
               ACTIV_IO_config_B[i] |= 0x0C;
            }
         }   
      }
      if((ACTIV_IO_config_B[i] & 0x30) > 0x10)
      {
         ACTIV_IO_config_B[i] &= 0xDF;    /*only for GUI*/
      }
      else
      {
         if((ACTIV_IO_config_B[i] & 0xC0) == 0x80)
         {
            if((GPIOB->ODR & (0x02 << i*2)) == 0x00)
            {
               ACTIV_IO_config_B[i] |= 0xC0;
            }
         }
      }          
   }
}


void IO_Configuration_C(void)
{
   /*IO Configuration for PortC*/
   u8 i;
   
   for (i = 0; i < 8; i++)
   {
      ACTIV_IO_config_C[i] = IO_config_C[i];
   }
  
   /* reseting Pins */
   GPIOC->CRL &= ~0xFFF0FFFF; 
   GPIOC->CRH &= ~0x00FFFFFF;  
  

   tempreg = IO_config_C[0]|(u32)(IO_config_C[1]<<8)|(u32)(IO_config_C[2]<<16)|(u32)(IO_config_C[3]<<24);
   tempreg &= 0xFFF0FFFF;
   GPIOC->CRL |= tempreg;
   
   tempreg = IO_config_C[4]|(u32)(IO_config_C[5]<<8)|(u32)(IO_config_C[6]<<16)|(u32)(IO_config_C[7]<<24);
   tempreg &= 0x00FFFFFF;
   GPIOC->CRH |= tempreg;
   
   for(i = 0;i < 8;i++)
   {
      if((IO_config_C[i] & 0x03) == 0x00)
      {
         if((IO_config_C[i] & 0x0C) == 0x08)
         {             
            GPIOC->ODR  = (GPIOC->ODR & ~(0x01 << i*2))  | (0x01 << i*2);   
         } 
         else
         {
            GPIOC->ODR  = (GPIOC->ODR & ~(0x01 << i*2));
         }
      }
      if((IO_config_C[i] & 0x30) == 0x00)
      {
         if((IO_config_C[i] & 0xC0) == 0x80)
         {
             GPIOC->ODR  = (GPIOC->ODR & ~(0x02 << i*2))  | (0x02 << i*2);   
         }
         else
         {
            GPIOC->ODR  = (GPIOC->ODR & ~(0x02 << i*2));
         }
      }          
   }     
}


void Get_IO_Configuration_C(void)
{
   u8 i;
   
   /**Get IO Configuration for PortB*/
   ACTIV_IO_config_C[0] = (u8)GPIOC->CRL;
   ACTIV_IO_config_C[1] = (u8)(GPIOC->CRL >> 8);
   ACTIV_IO_config_C[2] = (GPIOC->CRL >> 16) & 0xF0;
   ACTIV_IO_config_C[3] = (u8)(GPIOC->CRL >> 24);
   ACTIV_IO_config_C[4] = (u8)GPIOC->CRH;
   ACTIV_IO_config_C[5] = (u8)(GPIOC->CRH >> 8); 
   ACTIV_IO_config_C[6] = (u8)(GPIOC->CRH >> 16);
   ACTIV_IO_config_C[7] = (GPIOC->CRH >> 24) & 0x00;

   
   for(i = 0;i < 8;i++)
   {
      if((ACTIV_IO_config_C[i] & 0x03) > 0x01)  
      {
         ACTIV_IO_config_C[i] &= 0xFD;    /*only for GUI*/
      }
      else
      {
         if((ACTIV_IO_config_B[i] & 0x0C) == 0x08)
         {
            if((GPIOC->ODR & (0x01 << i*2)) == 0x00)
            {
               ACTIV_IO_config_B[i] |= 0x0C;
            }
         }     
      }
      if((ACTIV_IO_config_C[i] & 0x30) > 0x10)
      {      
         ACTIV_IO_config_C[i] &= 0xDF;    /*only for GUI*/
      }
      else
      {
         if((ACTIV_IO_config_B[i] & 0xC0) == 0x80)
         {
            if((GPIOC->ODR & (0x02 << i*2)) == 0x00)