📄 rtosinit_str71x.c
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#endif
}
/*********************************************************************
*
* OS_InitHW()
*
* Initialize the hardware (timer) required for embOS to run.
* May be modified, if an other timer should be used
*/
#define _OS_TIMER_ID T1_GI_VECT_ID // Assign to TC1 global interrupt
#define _OS_TIMER_PRIO 0x01 // lowest priority
void OS_InitHW(void) {
OS_DI();
// Initialize Peripheral clock divider
__PRCCU_PDIVR = (1 << 8) | (1 << 0); // Divide peripheral clocks by two (to ensure max. clock limit)
// Initialize timer for embOS, we use Timer 1
_OS_TIM_CR1 = 0; // Stop timer, reset mode
_OS_TIM_CR2 = 0; // Disable all interrupts, clear prescaler
_OS_TIM_OCR = _EMBOS_TIMER_INTERVAL; // Setup compare register, initially use 1000 ticks per second
_OS_TIM_CR1 = (1 << 15); // Start timer
_OS_TIM_CR2 = (1 << 14); // Enable output capture interrupt A
OS_ARM_InstallISRHandler(_OS_TIMER_ID, &_OS_ISR_Tick); // Timer/counter interrupt vector.
OS_ARM_ISRSetPrio(_OS_TIMER_ID, _OS_TIMER_PRIO); // Timer/counter interrupt priority.
OS_ARM_EnableISR(_OS_TIMER_ID); // Enable timer/counter 0 interrupt.
// optionally initialize UART for embOSView
OS_COM_Init();
__EIC_ICR |= 0x01; // Enable interrupt controller
OS_RestoreI();
}
/*********************************************************************
*
* Idle loop (OS_Idle)
*
* Please note:
* This is basically the "core" of the idle loop.
* This core loop can be changed, but:
* The idle loop does not have a stack of its own, therefore no
* functionality should be implemented that relies on the stack
* to be preserved. However, a simple program loop can be programmed
* (like toggeling an output or incrementing a counter)
*/
void OS_Idle(void) { // Idle loop: No task is ready to exec
while (1) {
}
}
/*********************************************************************
*
* Get time [cycles]
*
* This routine is required for task-info via embOSView or high
* resolution time maesurement functions.
* It returns the system time in timer clock cycles.
*/
OS_U32 OS_GetTime_Cycles(void) {
OS_U32 time;
OS_I16 count;
time = _OS_TIM_CNTR;
count = _OS_TIM_OCR - time; // Read current timer value
time = OS_GetTime32(); // Read current embOS time
if (count < 0) { // Timer Interrupt pending ?
time++; // Adjust result, read timer again
count = 0 - count;
} else {
count = _EMBOS_TIMER_INTERVAL - count;
}
return (_EMBOS_TIMER_INTERVAL) * time + count;
}
/*********************************************************************
*
* OS_ConvertCycles2us
*
* Convert Cycles into micro seconds.
*
* If your clock frequency is not a multiple of 1 MHz,
* you may have to modify this routine in order to get proper
* diagonstics.
*
* This routine is required for profiling or high resolution time
* measurement only. It does not affect operation of the OS.
*/
OS_U32 OS_ConvertCycles2us(OS_U32 Cycles) {
return Cycles/(OS_PCLK_TIMER/1000000);
}
/*********************************************************************
*
* Communication for embOSView via UART (optional)
*
**********************************************************************
*/
#if OS_UART_USED
/*********************************************************************
*
* OS_COM_ISR_Usart() embOS USART interrupt handler
* handles both, Rx and Tx interrupt
*/
static void _OS_COM_ISR(void) {
int UartStatus;
do {
UartStatus = _OS_UART_SR; // Examine status register
if (UartStatus & _RXRDY_FLAG) { // Data received?
if (UartStatus & _UART_RX_ERROR_FLAGS) { // Any error ?
_Dummy = _OS_UART_RxBUFR; // => Discard data
} else {
OS_OnRx(_OS_UART_RxBUFR); // Process actual byte
}
}
if (UartStatus & _TXRDY_FLAG) { // Check Tx status => Send next character
_OS_UART_SR &= ~_TXRDY_FLAG; // Clear Tx Int
if (OS_OnTx()) { // No more characters to send ?
_OS_UART_IER &= ~(1 << _TX_EMPTY_INT_BIT); // Disable further tx interrupts
}
}
} while (UartStatus & _OS_UART_IER & (_TXRDY_FLAG | _RXRDY_FLAG));
}
/*********************************************************************
*
* OS_COM_Send1()
* Never call this function directly from your application
*/
void OS_COM_Send1(OS_U8 c) {
_OS_UART_TxBUFR = c; // Send character
_OS_UART_IER |= (1 << _TX_EMPTY_INT_BIT); // enable Tx Empty interrupt
}
/*********************************************************************
*
* OS_COM_Init()
* Initialize UART for embOSView
*/
#define _BAUDDIVIDE ((OS_PCLK_UART+OS_BAUDRATE*8L)/(OS_BAUDRATE*16L))
void OS_COM_Init(void) {
OS_DI();
// Setup Port-Mode to alternate function, TX: push-pull, RX: open drain, CMOS input
__GPIO0_PC0 &= ~(_UART_RX_PIN); // Rx set to open drain
__GPIO0_PC0 |= _UART_TX_PIN; // Tx set to push pull
__GPIO0_PC1 |= (_UART_RX_PIN | _UART_TX_PIN); // Select alternate function
__GPIO0_PC2 &= ~(_UART_RX_PIN); // Select CMOS input
__GPIO0_PC2 |= _UART_TX_PIN; // Select output
_OS_UART_BR = _BAUDDIVIDE; // Setup baudrate generator
_OS_UART_CR = 0x01 // Setup UART control register, 8 data bits
| (1 << 3) // 1 Stop bit (bit 4:3 = 01)
| (0 << 5) // Parity, don't care
| (0 << 6) // Loopback disabled
| (1 << 7) // Baudrate generator on
| (1 << 8) // Rx Enable
| (0 << 9) // Smartcard mode disabled
| (0 << 10); // FIFO disabled
_OS_UART_TxRSTR = 0; // Clear Rx FIFO
_OS_UART_RxRSTR = 0; // Clear Tx FIFO
/* Install embOS UART interrupt handler */
OS_ARM_InstallISRHandler(_OS_UART_ID, &_OS_COM_ISR); // UART interrupt vector.
OS_ARM_ISRSetPrio(_OS_UART_ID, _OS_UART_PRIO); // UART interrupt level.
OS_ARM_EnableISR(_OS_UART_ID); // Enable embOS UART interrupt
_OS_UART_IER |= (1 << _RX_FULL_INT_BIT); // Enable Rx interrupts
OS_RestoreI();
}
#else /* selected UART not supported, using dummies */
void OS_COM_Init(void) {}
void OS_COM_Send1(OS_U8 c) {
OS_USEPARA(c); // avoid compiler warning
OS_COM_ClearTxActive(); // let embOS know that Tx is not busy
}
#endif /* OS_UART_USED */
/****** Final check of configuration ********************************/
#ifndef OS_UART_USED
#error "OS_UART_USED has to be defined"
#endif
/*********************************************************************
*
* embOS interrupt handler and ISR specific functions
*
**********************************************************************
*/
/*********************************************************************
*
* _OS_ISR_Undefined
*
* Is called when an uninstalled interrupt was detected
* As interrupt pending condition of peripherals has to be reset,
* program will not continue when interrupt is ignored.
*/
static void _OS_ISR_Undefined(int Index) {
#if (OS_IGNORE_UNDEFINED_INTERRUPT == 0)
_Dummy = Index;
/* You may set a breakpoint here to detect undefined interrupts */
while (_Dummy < (_INT_CHANNEL_MASK + 1)) {
}
#endif
}
/*********************************************************************
*
* OS_irq_handler
*
* Detect reason for IRQ and call correspondig service routine.
* OS_irq_handler is called from embOS OS_IRQ_SERVICE function
* found in RTOSVect.asm
*/
void OS_irq_handler(void) {
OS_ISR_HANDLER* pISR;
int ISRIndex;
ISRIndex = __EIC_IVR; // Perform a dummy vector read to update CICR
ISRIndex = __EIC_CICR & _INT_CHANNEL_MASK; // Examine current interrupt source (channel number)
pISR = _apOS_ISRHandler[ISRIndex]; // Read interrupt vector
OS_EnterNestableInterrupt(); // Now interrupts may be reenabled. If nesting should be allowed
if (pISR != NULL) {
pISR(); // Call installed interrupt service routine
} else {
_OS_ISR_Undefined(ISRIndex);
}
OS_DI(); // Disable interrupts and unlock
__EIC_IPR |= (1 << ISRIndex); // Clear current interrupt pending bit, reset EIC
OS_LeaveNestableInterrupt(); // Replace by OS_LeaveInterrupt(), when nesting was disabled
}
/*********************************************************************
*
* OS_ARM_InstallISRHandler
*
*/
OS_ISR_HANDLER* OS_ARM_InstallISRHandler (int ISRIndex, OS_ISR_HANDLER* pISRHandler) {
OS_ISR_HANDLER* pOldHandler;
pOldHandler = NULL;
OS_DI();
if (ISRIndex < NUM_INT_SOURCES) {
pOldHandler = _apOS_ISRHandler[ISRIndex];
_apOS_ISRHandler[ISRIndex] = pISRHandler;
}
OS_RestoreI();
return pOldHandler;
}
/*********************************************************************
*
* OS_ARM_EnableISR
*
*/
void OS_ARM_EnableISR(int ISRIndex) {
OS_DI();
if (ISRIndex < NUM_INT_SOURCES) {
__EIC_IER |= (1 << ISRIndex);
}
OS_RestoreI();
}
/*********************************************************************
*
* OS_ARM_DisableISR
*
*/
void OS_ARM_DisableISR(int ISRIndex) {
OS_DI();
if (ISRIndex < NUM_INT_SOURCES) {
__EIC_IER &= ~(1 << ISRIndex);
}
OS_RestoreI();
}
/*********************************************************************
*
* OS_ARM_ISRSetPrio
*
*/
int OS_ARM_ISRSetPrio(int ISRIndex, int Prio) {
OS_U32* pPrio;
int OldPrio;
OS_DI();
pPrio = (OS_U32*)&__EIC_SIR0;
OldPrio = pPrio[ISRIndex];
pPrio[ISRIndex] = (OldPrio & ~_INT_PRIORITY_MASK) | (Prio & _INT_PRIORITY_MASK);
OS_RestoreI();
return OldPrio & _INT_PRIORITY_MASK;
}
/***** EOF ********************************************************/
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