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📄 startup.lst

📁 用c8051f310开发的433M无线模块cc1100的完整程序
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A51 MACRO ASSEMBLER  STARTUP                                                              06/13/2008 15:24:05 PAGE     1


MACRO ASSEMBLER A51 V8.00d
OBJECT MODULE PLACED IN .\object\STARTUP.obj
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE 源代码\STARTUP.A51 SET(SMALL) DEBUG PRINT(.\list\STARTUP.lst) OBJECT(.\obj
                      ect\STARTUP.obj) EP

LOC  OBJ            LINE     SOURCE

                       1     ;本启动程序应用于CC1100_F310无线模块试验版
                       2     $nomod51 
                       3     ;$include (C8051F310.INC)
                +1     4     ;---------------------------------------------------------------------------
                +1     5     ;  
                +1     6     ;  
                +1     7     ;
                +1     8     ;
                +1     9     ;  FILE NAME   : C8051F310.INC
                +1    10     ;  TARGET MCUs : C8051F310, 'F311
                +1    11     ;  DESCRIPTION : Register/bit definitions for the C8051F31x product family.
                +1    12     ;
                +1    13     ;  REVISION 1.3
                +1    14     ;     -- added ESPI0 and PSPI0
                +1    15     ;  REVISION 1.2
                +1    16     ;     -- added VDM0CN (0xff)   
                +1    17     ;
                +1    18     ;  REVISION 1.1
                +1    19     ;     -- changed TARGET MCUs to 'F310, 'F311
                +1    20     ;     -- SPICFG --> SPI0CFG
                +1    21     ;     -- SPICKR --> SPI0CKR
                +1    22     ;     -- SPIDAT --> SPI0DAT
                +1    23     ;     -- removed CLKMUL (0xb9)
                +1    24     ;     -- AMUX0N --> AMX0N
                +1    25     ;     -- AMUX0P --> AMX0P
                +1    26     ;
                +1    27     ;---------------------------------------------------------------------------
                +1    28     
                +1    29     ; BYTE Registers 
  0080          +1    30     P0       DATA  080H     ; PORT 0                                                   
  0081          +1    31     SP       DATA  081H     ; STACK POINTER                                            
  0082          +1    32     DPL      DATA  082H     ; DATA POINTER - LOW BYTE                                  
  0083          +1    33     DPH      DATA  083H     ; DATA POINTER - HIGH BYTE                                 
  0087          +1    34     PCON     DATA  087H     ; POWER CONTROL                                            
  0088          +1    35     TCON     DATA  088H     ; TIMER CONTROL                                            
  0089          +1    36     TMOD     DATA  089H     ; TIMER MODE                                               
  008A          +1    37     TL0      DATA  08AH     ; TIMER 0 - LOW BYTE                                       
  008B          +1    38     TL1      DATA  08BH     ; TIMER 1 - LOW BYTE                                       
  008C          +1    39     TH0      DATA  08CH     ; TIMER 0 - HIGH BYTE                                      
  008D          +1    40     TH1      DATA  08DH     ; TIMER 1 - HIGH BYTE                                      
  008E          +1    41     CKCON    DATA  08EH     ; CLOCK CONTROL                                            
  008F          +1    42     PSCTL    DATA  08FH     ; PROGRAM STORE R/W CONTROL                                
  0090          +1    43     P1       DATA  090H     ; PORT 1                                                   
  0091          +1    44     TMR3CN   DATA  091H     ; TIMER 3 CONTROL                                          
  0092          +1    45     TMR3RLL  DATA  092H     ; TIMER 3 RELOAD LOW                                       
  0093          +1    46     TMR3RLH  DATA  093H     ; TIMER 3 RELOAD HIGH                                      
  0094          +1    47     TMR3L    DATA  094H     ; TIMER 3 LOW BYTE                                         
  0095          +1    48     TMR3H    DATA  095H     ; TIMER 3 HIGH BYTE                                        
  0098          +1    49     SCON0    DATA  098H     ; SERIAL PORT 0 CONTROL                                    
  0099          +1    50     SBUF0    DATA  099H     ; SERIAL PORT 0 BUFFER                                     
  009A          +1    51     CPT1CN   DATA  09AH     ; COMPARATOR 1 CONTROL                                     
  009B          +1    52     CPT0CN   DATA  09BH     ; COMPARATOR 0 CONTROL                                     
  009C          +1    53     CPT1MD   DATA  09CH     ; COMPARATOR 1 MODE                                        
  009D          +1    54     CPT0MD   DATA  09DH     ; COMPARATOR 0 MODE                                        
  009E          +1    55     CPT1MX   DATA  09EH     ; COMPARATOR 1 MUX                                         
  009F          +1    56     CPT0MX   DATA  09FH     ; COMPARATOR 0 MUX                                         
  00A0          +1    57     P2       DATA  0A0H     ; PORT 2                                                   
A51 MACRO ASSEMBLER  STARTUP                                                              06/13/2008 15:24:05 PAGE     2

  00A1          +1    58     SPI0CFG  DATA  0A1H     ; SPI0 CONFIGURATION                                        
  00A2          +1    59     SPI0CKR  DATA  0A2H     ; SPI0 CLOCK CONFIGURATION                                  
  00A3          +1    60     SPI0DAT  DATA  0A3H     ; SPI0 DATA                                         
  00A4          +1    61     P0MDOUT  DATA  0A4H     ; PORT 0 OUTPUT MODE                                       
  00A5          +1    62     P1MDOUT  DATA  0A5H     ; PORT 1 OUTPUT MODE                                       
  00A6          +1    63     P2MDOUT  DATA  0A6H     ; PORT 2 OUTPUT MODE                                       
  00A7          +1    64     P3MDOUT  DATA  0A7H     ; PORT 3 OUTPUT MODE                                       
  00A8          +1    65     IE       DATA  0A8H     ; INTERRUPT ENABLE                                         
  00A9          +1    66     CLKSEL   DATA  0A9H     ; CLOCK SOURCE SELECT                                      
  00AA          +1    67     EMI0CN   DATA  0AAH     ; EXTERNAL MEMORY INTERFACE CONTROL                        
  00B0          +1    68     P3       DATA  0B0H     ; PORT 3                                                   
  00B1          +1    69     OSCXCN   DATA  0B1H     ; EXTERNAL OSCILLATOR CONTROL                              
  00B2          +1    70     OSCICN   DATA  0B2H     ; INTERNAL OSCILLATOR CONTROL                              
  00B3          +1    71     OSCICL   DATA  0B3H     ; INTERNAL OSCILLATOR CALIBRATION                          
  00B5          +1    72     FLACL    DATA  0B5H     ; FLASH ACCESS LIMIT
  00B6          +1    73     FLSCL    DATA  0B6H     ; FLASH SCALE                                              
  00B7          +1    74     FLKEY    DATA  0B7H     ; FLASH LOCK & KEY                                         
  00B8          +1    75     IP       DATA  0B8H     ; INTERRUPT PRIORITY   
  00BA          +1    76     AMX0N    DATA  0BAH     ; ADC0 MUX NEGATIVE CHANNEL SELECTION                      
  00BB          +1    77     AMX0P    DATA  0BBH     ; ADC0 MUX POSITIVE CHANNEL SELECTION                      
  00BC          +1    78     ADC0CF   DATA  0BCH     ; ADC0 CONFIGURATION                                       
  00BD          +1    79     ADC0L    DATA  0BDH     ; ADC0 DATA LOW                                            
  00BE          +1    80     ADC0H    DATA  0BEH     ; ADC0 DATA HIGH                                           
  00C0          +1    81     SMB0CN   DATA  0C0H     ; SMBUS CONTROL                                            
  00C1          +1    82     SMB0CF   DATA  0C1H     ; SMBUS CONFIGURATION                                      
  00C2          +1    83     SMB0DAT  DATA  0C2H     ; SMBUS DATA                                             
  00C3          +1    84     ADC0GTL  DATA  0C3H     ; ADC0 GREATER-THAN LOW                                    
  00C4          +1    85     ADC0GTH  DATA  0C4H     ; ADC0 GREATER-THAN HIGH                                   
  00C5          +1    86     ADC0LTL  DATA  0C5H     ; ADC0 LESS-THAN LOW                                       
  00C6          +1    87     ADC0LTH  DATA  0C6H     ; ADC0 LESS-THAN HIGH                                      
  00C8          +1    88     TMR2CN   DATA  0C8H     ; TIMER 2 CONTROL                                                
  00CA          +1    89     TMR2RLL  DATA  0CAH     ; TIMER 2 RELOAD LOW                                       
  00CB          +1    90     TMR2RLH  DATA  0CBH     ; TIMER 2 RELOAD HIGH                                      
  00CC          +1    91     TMR2L    DATA  0CCH     ; TIMER 2 LOW BYTE                                         
  00CD          +1    92     TMR2H    DATA  0CDH     ; TIMER 2 HIGH BYTE                                        
  00D0          +1    93     PSW      DATA  0D0H     ; PROGRAM STATUS WORD                                      
  00D1          +1    94     REF0CN   DATA  0D1H     ; VOLTAGE REFERENCE 0 CONTROL                              
  00D4          +1    95     P0SKIP   DATA  0D4H     ; PORT 0 CROSSBAR SKIP                                     
  00D5          +1    96     P1SKIP   DATA  0D5H     ; PORT 1 CROSSBAR SKIP                                     
  00D6          +1    97     P2SKIP   DATA  0D6H     ; PORT 2 CROSSBAR SKIP     
  00D8          +1    98     PCA0CN   DATA  0D8H     ; PCA0 CONTROL                                             
  00D9          +1    99     PCA0MD   DATA  0D9H     ; PCA0 MODE                                                
  00DA          +1   100     PCA0CPM0 DATA  0DAH     ; PCA0 MODULE 0 MODE                                       
  00DB          +1   101     PCA0CPM1 DATA  0DBH     ; PCA0 MODULE 1 MODE                                       
  00DC          +1   102     PCA0CPM2 DATA  0DCH     ; PCA0 MODULE 2 MODE     
  00DD          +1   103     PCA0CPM3 DATA  0DDH     ; PCA0 MODULE 3 MODE                                       
  00DE          +1   104     PCA0CPM4 DATA  0DEH     ; PCA0 MODULE 4 MODE                                    
  00E0          +1   105     ACC      DATA  0E0H     ; ACCUMULATOR                                              
  00E1          +1   106     XBR0     DATA  0E1H     ; DIGITAL CROSSBAR CONFIGURATION REGISTER 0                
  00E2          +1   107     XBR1     DATA  0E2H     ; DIGITAL CROSSBAR CONFIGURATION REGISTER 1                
  00E4          +1   108     IT01CF   DATA  0E4H     ; INT0/INT1 CONFIGURATION                                  
  00E6          +1   109     EIE1     DATA  0E6H     ; EXTERNAL INTERRUPT ENABLE 1                     
  00E8          +1   110     ADC0CN   DATA  0E8H     ; ADC 0 CONTROL                                            
  00E9          +1   111     PCA0CPL1 DATA  0E9H     ; PCA0 MODULE 1 CAPTURE/COMPARE REGISTER LOW BYTE          
  00EA          +1   112     PCA0CPH1 DATA  0EAH     ; PCA0 MODULE 1 CAPTURE/COMPARE REGISTER HIGH BYTE         
  00EB          +1   113     PCA0CPL2 DATA  0EBH     ; PCA0 MODULE 2 CAPTURE/COMPARE REGISTER LOW BYTE          
  00EC          +1   114     PCA0CPH2 DATA  0ECH     ; PCA0 MODULE 2 CAPTURE/COMPARE REGISTER HIGH BYTE         
  00ED          +1   115     PCA0CPL3 DATA  0EDH     ; PCA0 MODULE 3 CAPTURE/COMPARE REGISTER LOW BYTE          
  00EE          +1   116     PCA0CPH3 DATA  0EEH     ; PCA0 MODULE 3 CAPTURE/COMPARE REGISTER HIGH BYTE         
  00EF          +1   117     RSTSRC   DATA  0EFH     ; RESET SOURCE                                             
  00F0          +1   118     B        DATA  0F0H     ; B REGISTER                                               
  00F1          +1   119     P0MDIN   DATA  0F1H     ; PORT 0 INPUT MODE REGISTER                               
  00F2          +1   120     P1MDIN   DATA  0F2H     ; PORT 1 INPUT MODE REGISTER                               
  00F3          +1   121     P2MDIN   DATA  0F3H     ; PORT 2 INPUT MODE REGISTER                               
  00F4          +1   122     P3MDIN   DATA  0F4H     ; PORT 3 INPUT MODE REGISTER                               
  00F6          +1   123     EIP1     DATA  0F6H     ; EXTERNAL INTERRUPT PRIORITY 1
A51 MACRO ASSEMBLER  STARTUP                                                              06/13/2008 15:24:05 PAGE     3

  00F8          +1   124     SPI0CN   DATA  0F8H     ; SPI0 CONTROL                                             
  00F9          +1   125     PCA0L    DATA  0F9H     ; PCA0 COUNTER REGISTER LOW BYTE                           
  00FA          +1   126     PCA0H    DATA  0FAH     ; PCA0 COUNTER REGISTER HIGH BYTE                          
  00FB          +1   127     PCA0CPL0 DATA  0FBH     ; PCA MODULE 0 CAPTURE/COMPARE REGISTER LOW BYTE           
  00FC          +1   128     PCA0CPH0 DATA  0FCH     ; PCA MODULE 0 CAPTURE/COMPARE REGISTER HIGH BYTE          
  00FD          +1   129     PCA0CPL4 DATA  0FDH     ; PCA MODULE 4 CAPTURE/COMPARE REGISTER LOW BYTE           
  00FE          +1   130     PCA0CPH4 DATA  0FEH     ; PCA MODULE 4 CAPTURE/COMPARE REGISTER HIGH BYTE      
  00FF          +1   131     VDM0CN    DATA  0FFH ; VDD MONITOR CONTROL
                +1   132     
                +1   133     ;------------------------------------------------------------------------------
                +1   134     ;BIT DEFINITIONS
                +1   135     ;
                +1   136     ; TCON 88H
  0088          +1   137     IT0      BIT   TCON.0   ; EXT. INTERRUPT 0 TYPE
  0089          +1   138     IE0      BIT   TCON.1   ; EXT. INTERRUPT 0 EDGE FLAG
  008A          +1   139     IT1      BIT   TCON.2   ; EXT. INTERRUPT 1 TYPE
  008B          +1   140     IE1      BIT   TCON.3   ; EXT. INTERRUPT 1 EDGE FLAG
  008C          +1   141     TR0      BIT   TCON.4   ; TIMER 0 ON/OFF CONTROL
  008D          +1   142     TF0      BIT   TCON.5   ; TIMER 0 OVERFLOW FLAG
  008E          +1   143     TR1      BIT   TCON.6   ; TIMER 1 ON/OFF CONTROL
  008F          +1   144     TF1      BIT   TCON.7   ; TIMER 1 OVERFLOW FLAG
                +1   145     
                +1   146     ; SCON0  0x98 
  0098          +1   147     RI0      BIT   SCON0.0  ; RECEIVE INTERRUPT FLAG                                
  0099          +1   148     TI0      BIT   SCON0.1  ; TRANSMIT INTERRUPT FLAG                               
  009A          +1   149     RB80     BIT   SCON0.2  ; RECEIVE BIT 8                                         
  009B          +1   150     TB80     BIT   SCON0.3  ; TRANSMIT BIT 8                                        
  009C          +1   151     REN0     BIT   SCON0.4  ; RECEIVE ENABLE                                        
  009D          +1   152     MCE0     BIT   SCON0.5  ; MULTIPROCESSOR COMMUNICATION ENABLE                   
  009F          +1   153     S0MODE   BIT   SCON0.7  ; SERIAL MODE CONTROL BIT 0                             
                +1   154     
                +1   155     ; IE  0xA8 
  00A8          +1   156     EX0      BIT   IE.0     ; EXTERNAL INTERRUPT 0 ENABLE                           
  00A9          +1   157     ET0      BIT   IE.1     ; TIMER 0 INTERRUPT ENABLE                              
  00AA          +1   158     EX1      BIT   IE.2     ; EXTERNAL INTERRUPT 1 ENABLE                           
  00AB          +1   159     ET1      BIT   IE.3     ; TIMER 1 INTERRUPT ENABLE                              
  00AC          +1   160     ES0      BIT   IE.4     ; UART0 INTERRUPT ENABLE                                
  00AD          +1   161     ET2      BIT   IE.5     ; TIMER 2 INTERRUPT ENABLE                              
  00AE          +1   162     ESPI0    BIT   IE.6     ; SPI0 INTERRUPT ENABLE
  00AF          +1   163     EA       BIT   IE.7     ; GLOBAL INTERRUPT ENABLE                               
                +1   164     
                +1   165     ; IP  0xB8 
  00B8          +1   166     PX0      BIT   IP.0     ; EXTERNAL INTERRUPT 0 PRIORITY                         
  00B9          +1   167     PT0      BIT   IP.1     ; TIMER 0 PRIORITY                                      
  00BA          +1   168     PX1      BIT   IP.2     ; EXTERNAL INTERRUPT 1 PRIORITY                         

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