xsbase270.h

pxa270 的bootloader源码

#ifndef _BOARD_XSBASE270_H
#define _BOARD_XSBASE270_H

/* default values for memory setup */
#define CCCR_LCD13MHz			(0x08000000*0)
#define CCCR_LCD26MHz			(0x08000000*1)
#define _CCCR				  0x08000290//	(0x00000210 | CCCR_LCD26MHz)
#define _MSC0					0x7FF82BD0
#define _MSC1					0x7FF87FF8
#define _MSC2					0x7FF87FF8
#define _MDCNFG				    	0x00001AC9
#define _MDREFR			              	0x0101801E
#define _MECR					0x00000001
#define _SXCNFG					0x00000000
#define _MCMEM0					0x00010504
#define _MCMEM1					0x00010504
#define _MCATT0					0x00010504
#define _MCATT1					0x00010504
#define _MCIO0					0x00004715
#define _MCIO1					0x00004715
#define _MDMRS					0x00000000

/* flash map */
#define LOADER_SRAM_BASE		0x00000000
#define LOADER_DRAM_BASE		0xA1E00000
#define LOADER_MAX_SIZE			0x00040000
#define KERNEL_SRAM_BASE		0x00040000
#define KERNEL_DRAM_BASE		0xA0008000
#define KERNEL_MAX_SIZE			0x00140000
#define RAMDISK_SRAM_BASE		0x00180000
#define RAMDISK_DRAM_BASE		0xA1000000
#define RAMDISK_MAX_SIZE		0x00300000
#define ROOTFS_SRAM_BASE		0x00180000
#define ROOTFS_DRAM_BASE		0xA0000000
#define ROOTFS_MAX_SIZE	                0x01e80000//	0x03E80000

#define _GPDR0			     0x00208000 | (1<<16)         //0xC020B800
#define _GPDR1			     0x00cf0382	        //0xFC008082
#define _GPDR2			     0x0021c000         //0x00C1FFFF
#define _GPDR3			                        0x00020000
#define _GPSR0					0x00003000 
#define _GPSR1					0x00000000
#define _GPSR2					0x00010000
#define _GPSR3					0x00020000
#define _GPCR0					0x00000800
#define _GPCR1					0x00000000
#define _GPCR2					0x00000000
#define _GPCR3					0x00000000
#define _GAFR0L			     0x80000000 	//0x80000000
#define _GAFR0U			     0x00000010 | (2<<0 )     //0xA5000400
#define _GAFR1L			     0x000a9558		//0x60008018
#define _GAFR1U			     0x000590aa	        //0xAAA00000
#define _GAFR2L			     0xa0000000		//0xAAAAAAAA
#define _GAFR2U			     0x00000402         //0x0000A002
#define _GAFR3L			     0x0	        //0x00000000
#define _GAFR3U			     0x00001400	        //0x00000008

#define BOOTADDR				0xA3F00000	/* 64MB - 1MB */
#define BOOT_PARAMS				0xA0000100

#define _MDCNFG_ED                    0x8c9//wince 0x9c9
#define _MDREFR_ED                    0x2009e01d //wince 0x91c01d
#define _SXCNFG_ED                    0x40044004
#define _MSC0_ED                      0xA7A3
#define _MSC1_ED                      0xb88ca691//0xb884A691  //if access lan91c11 is 32 bit :0xb884a691,else is 0xb88ca691
#define _MSC2_ED                      0x0000B88C




#endif