readme.txt

对ADSP21369的原理图和测试程序进行搜集

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Example:  ADSP-21369 EZ-KIT LITE Core Timer
Target:   ADSP-21369
Date:     July 29, 2005
Tools:    VisualDSP++ 4.0 
Hardware: ADSP-21369 EZ-KIT LITE
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This project provides assembly code which initializes the core timer and its
high priority interrupt. The interrupt service routine which is triggered for
each interrupt toggles the FLAG LED's on the Ezkit.
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Source Files contained in this directory:
Core Timer.dpj       VisualDSP project file
Core Timer.asm       ADSP-21369 source - main routine and ISR
initPLL_SDRAM.asm    Configures the DSP to run at CCLK= 393.21 MHz & SDCLK= 157.28 MHz
21369_IVT.asm        Interrupt Vector table for the project
ADSP-21369-EZKIT.ldf Linker Description file
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Dependencies contained in VisualDSP++ default include path:
def21369.h          Header file with generic definitions
SRU.h				Header file to route DAI/DPI signals
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Analog Devices, Inc.
DSP Division
One Technology Way
Norwood, MA 02062

(c) 2005 Analog Devices, Inc.  All rights reserved.
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