lm3s6110.h

来自「Luminary coxter_M3 内核的遥控源代码」· C头文件 代码 · 共 1,113 行 · 第 1/5 页

#define UART_MIS_TXMIS          0x00000020  // UART Transmit Masked Interrupt
                                            // Status.
#define UART_MIS_RXMIS          0x00000010  // UART Receive Masked Interrupt
                                            // Status.

//*****************************************************************************
//
// The following are defines for the bit fields in the UART_O_ICR register.
//
//*****************************************************************************
#define UART_ICR_OEIC           0x00000400  // Overrun Error Interrupt Clear.
#define UART_ICR_BEIC           0x00000200  // Break Error Interrupt Clear.
#define UART_ICR_PEIC           0x00000100  // Parity Error Interrupt Clear.
#define UART_ICR_FEIC           0x00000080  // Framing Error Interrupt Clear.
#define UART_ICR_RTIC           0x00000040  // Receive Time-Out Interrupt
                                            // Clear.
#define UART_ICR_TXIC           0x00000020  // Transmit Interrupt Clear.
#define UART_ICR_RXIC           0x00000010  // Receive Interrupt Clear.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_CTL register.
//
//*****************************************************************************
#define PWM_CTL_GLOBALSYNC0     0x00000001  // Update PWM Generator 0.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_SYNC register.
//
//*****************************************************************************
#define PWM_SYNC_SYNC0          0x00000001  // Reset Generator 0 Counter.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_ENABLE register.
//
//*****************************************************************************
#define PWM_ENABLE_PWM1EN       0x00000002  // PWM1 Output Enable.
#define PWM_ENABLE_PWM0EN       0x00000001  // PWM0 Output Enable.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_INVERT register.
//
//*****************************************************************************
#define PWM_INVERT_PWM1INV      0x00000002  // Invert PWM1 Signal.
#define PWM_INVERT_PWM0INV      0x00000001  // Invert PWM0 Signal.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_FAULT register.
//
//*****************************************************************************
#define PWM_FAULT_FAULT1        0x00000002  // PWM1 Driven Low on Fault.
#define PWM_FAULT_FAULT0        0x00000001  // PWM0 Driven Low on Fault.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_INTEN register.
//
//*****************************************************************************
#define PWM_INTEN_INTFAULT      0x00010000  // Fault Interrupt Enable.
#define PWM_INTEN_INTPWM0       0x00000001  // PWM0 Interrupt Enable.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_RIS register.
//
//*****************************************************************************
#define PWM_RIS_INTFAULT        0x00010000  // Fault Interrupt Asserted.
#define PWM_RIS_INTPWM0         0x00000001  // PWM0 Interrupt Asserted.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_ISC register.
//
//*****************************************************************************
#define PWM_ISC_INTFAULT        0x00010000  // Fault Interrupt Asserted.
#define PWM_ISC_INTPWM0         0x00000001  // PWM0 Interrupt Status.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_STATUS register.
//
//*****************************************************************************
#define PWM_STATUS_FAULT        0x00000001  // Fault Interrupt Status.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_CTL register.
//
//*****************************************************************************
#define PWM_X_CTL_CMPBUPD       0x00000020  // Comparator B Update Mode.
#define PWM_X_CTL_CMPAUPD       0x00000010  // Comparator A Update Mode.
#define PWM_X_CTL_LOADUPD       0x00000008  // Load Register Update Mode.
#define PWM_X_CTL_DEBUG         0x00000004  // Debug Mode.
#define PWM_X_CTL_MODE          0x00000002  // Counter Mode.
#define PWM_X_CTL_ENABLE        0x00000001  // PWM Block Enable.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_INTEN register.
//
//*****************************************************************************
#define PWM_X_INTEN_INTCMPBD    0x00000020  // Interrupt for Counter=Comparator
                                            // B Down.
#define PWM_X_INTEN_INTCMPBU    0x00000010  // Interrupt for Counter=Comparator
                                            // B Up.
#define PWM_X_INTEN_INTCMPAD    0x00000008  // Interrupt for Counter=Comparator
                                            // A Down.
#define PWM_X_INTEN_INTCMPAU    0x00000004  // Interrupt for Counter=Comparator
                                            // A Up.
#define PWM_X_INTEN_INTCNTLOAD  0x00000002  // Interrupt for Counter=Load.
#define PWM_X_INTEN_INTCNTZERO  0x00000001  // Interrupt for Counter=0.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_RIS register.
//
//*****************************************************************************
#define PWM_X_RIS_INTCMPBD      0x00000020  // Comparator B Down Interrupt
                                            // Status.
#define PWM_X_RIS_INTCMPBU      0x00000010  // Comparator B Up Interrupt
                                            // Status.
#define PWM_X_RIS_INTCMPAD      0x00000008  // Comparator A Down Interrupt
                                            // Status.
#define PWM_X_RIS_INTCMPAU      0x00000004  // Comparator A Up Interrupt
                                            // Status.
#define PWM_X_RIS_INTCNTLOAD    0x00000002  // Counter=Load Interrupt Status.
#define PWM_X_RIS_INTCNTZERO    0x00000001  // Counter=0 Interrupt Status.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_ISC register.
//
//*****************************************************************************
#define PWM_X_ISC_INTCMPBD      0x00000020  // Comparator B Down Interrupt.
#define PWM_X_ISC_INTCMPBU      0x00000010  // Comparator B Up Interrupt.
#define PWM_X_ISC_INTCMPAD      0x00000008  // Comparator A Down Interrupt.
#define PWM_X_ISC_INTCMPAU      0x00000004  // Comparator A Up Interrupt.
#define PWM_X_ISC_INTCNTLOAD    0x00000002  // Counter=Load Interrupt.
#define PWM_X_ISC_INTCNTZERO    0x00000001  // Counter=0 Interrupt.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_LOAD register.
//
//*****************************************************************************
#define PWM_X_LOAD_M            0x0000FFFF  // Counter Load Value.
#define PWM_X_LOAD_S            0

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_COUNT register.
//
//*****************************************************************************
#define PWM_X_COUNT_M           0x0000FFFF  // Counter Value.
#define PWM_X_COUNT_S           0

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_CMPA register.
//
//*****************************************************************************
#define PWM_X_CMPA_M            0x0000FFFF  // Comparator A Value.
#define PWM_X_CMPA_S            0

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_CMPB register.
//
//*****************************************************************************
#define PWM_X_CMPB_M            0x0000FFFF  // Comparator B Value.
#define PWM_X_CMPB_S            0

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM_O_0_GENA register.
//
//*****************************************************************************
#define PWM_X_GENA_ACTCMPBD_M   0x00000C00  // Action for Comparator B Down.
#define PWM_X_GENA_ACTCMPBD_NONE \
                                0x00000000  // Do nothing.
#define PWM_X_GENA_ACTCMPBD_INV 0x00000400  // Invert the output signal.
#define PWM_X_GENA_ACTCMPBD_ZERO \
                                0x00000800  // Set the output signal to 0.
#define PWM_X_GENA_ACTCMPBD_ONE 0x00000C00  // Set the output signal to 1.
#define PWM_X_GENA_ACTCMPBU_M   0x00000300  // Action for Comparator B Up.
#define PWM_X_GENA_ACTCMPBU_NONE \
                                0x00000000  // Do nothing.
#define PWM_X_GENA_ACTCMPBU_INV 0x00000100  // Invert the output signal.
#define PWM_X_GENA_ACTCMPBU_ZERO \
                                0x00000200  // Set the output signal to 0.
#define PWM_X_GENA_ACTCMPBU_ONE 0x00000300  // Set the output signal to 1.
#define PWM_X_GENA_ACTCMPAD_M   0x000000C0  // Action for Comparator A Down.
#define PWM_X_GENA_ACTCMPAD_NONE \
                                0x00000000  // Do nothing.
#define PWM_X_GENA_ACTCMPAD_INV 0x00000040  // Invert the output signal.
#define PWM_X_GENA_ACTCMPAD_ZERO \
                                0x00000080  // Set the output signal to 0.
#define PWM_X_GENA_ACTCMPAD_ONE 0x000000C0  // Set the output signal to 1.
#define PWM_X_GENA_ACTCMPAU_M   0x00000030  // Action for Comparator A Up.
#define PWM_X_GENA_ACTCMPAU_NONE \
                                0x00000000  // Do nothing.
#define PWM_X_GENA_ACTCMPAU_INV 0x00000010  // Invert the output signal.
#define PWM_X_GENA_ACTCMPAU_ZERO \
                                0x00000020  // Set the output signal to 0.
#define PWM_X_GENA_ACTCMPAU_ONE 0x00000030  // Set the output signal to 1.
#define PWM_X_GENA_ACTLOAD_M    0x0000000C  // Action for Counter=Load.
#define PWM_X_GENA_ACTLOAD_NONE 0x00000000  // Do nothing.
#define PWM_X_GENA_ACTLOAD_INV  0x00000004  // Invert the output signal.
#define PWM_X_GENA_ACTLOAD_ZERO 0x00000008  // Set the output signal to 0.
#define PWM_X_GENA_ACTLOAD_ONE  0x0000000C  // Set the output signal to 1.
#define PWM_X_GENA_ACTZERO_M    0x00000003  // Action for Counter=0.
#define PWM_X_GENA_ACTZERO_NONE 0x00000000  // Do nothing.
#define PWM_X_GENA_ACTZERO_INV  0x00000001  // Invert the output signal.
#define PWM_X_GENA_ACTZERO_ZERO 0x00000002  // Set the output signal to 0.
#define PWM_X_GENA_ACTZERO_ONE  0x00000003  // Set the output signal to 1.

//**********************************************************