vpc323xd.c

sigma_designs的tuner驱动

/**********************************************************************
 * vpc323xd.c
 * vpc323xd api implementation
 *
 * Copyright (C) 2004 Sigma Designs, Inc.
 *
 * $Log: vpc323xd.c,v $
 * Revision 1.2  2006/01/22 00:32:29  bertrand
 * Ported contents of set_tron from dcc_2_branch to HEAD
 *
 * Revision 1.1.1.1.2.2  2005/06/23 11:23:16  michon
 * fixbuild
 *
 * Revision 1.1.1.1  2005/03/10 00:06:00  bertrand
 * Initial import of the DTV specific code into the ndc repository
 *
 * Revision 1.1.1.1  2004/11/10 03:02:41  jpong
 * i2c devices
 *
 * Revision 1.10  2004/09/29 21:58:07  jpong
 * check multiple times on auto after standard switch
 * removed some debug messages
 *
 * Revision 1.9  2004/09/28 03:35:04  jpong
 * autodetect
 *
 * Revision 1.8  2004/09/17 23:51:20  jpong
 * select inputs without detection
 *
 * Revision 1.7  2004/08/05 01:39:58  jpong
 * updates, fixed vpc_rd/fp bug
 *
 * Revision 1.6  2004/08/04 01:48:58  jpong
 * select input implemented, not tested
 *
 * Revision 1.3  2004/07/28 01:52:15  jpong
 * additional
 *
 * Revision 1.1.1.1  2004/07/24 03:05:40  jpong
 * board test
 *
 *
 *
 **********************************************************************/
 
#include <stdio.h>

//Standard 86xx includes
#define ALLOW_OS_CODE 1
#include "rmdef/rmdef.h"
#include "llad/include/gbus.h"
//#include "emhwlib_hal/include/emhwlib_registers.h"

//86xx i2c
//#include "emhwlib_hal/i2c/include/i2c_hal.h"

//helper includes
#include "../helper/helper.h"
//#include "../emi2c/emi2c.h"

//vpc includes
#include "vpc323xd.h"
#include "vpc323xd_tables.h"

RMstatus vpc_fpWr(VPC323XD_CONFIG* pC, RMuint16 addx, RMuint16 data);
RMstatus vpc_fpRd(VPC323XD_CONFIG* pC, RMuint16 addx, RMuint16* pData);
RMstatus vpc_rd(VPC323XD_CONFIG* pC, RMuint8 subAddx, RMuint16 *pData, RMuint32 byteCount);
RMstatus vpc_wr(VPC323XD_CONFIG* pC, RMuint8 subAddx, RMuint16 data, RMuint32 byteCount);
RMstatus vpc_send_cmdTable(VPC323XD_CONFIG* pC, VPC_CMD* pTable, RMuint32 byteCount);



// implememtation

RMstatus vpc_fpWr(VPC323XD_CONFIG* pC, RMuint16 addx, RMuint16 data)
{
	RMuint8 buffer[2];
	RMuint32 byteCount = 0;
	RMstatus s;
		
	assert( pC != NULL );
	
	// MSB is sent first, must reorder
	buffer[1] = addx & 0xFF;
	buffer[0] = (addx >> 8) & 0xFF;
	byteCount = 2;
	if( (s = I2Cal_Write_Subaddress( pC->pI2Cal_Context, I2C_WR_ADDR(pC->uI2CAddress), VPC323XD_FPWR, buffer, &byteCount)) != RM_OK )
		return s;

	// MSB is sent first, must reorder
	buffer[1] = data & 0xFF;
	buffer[0] = (data >> 8) & 0xFF;
	byteCount = 2;
	if( (s = I2Cal_Write_Subaddress( pC->pI2Cal_Context, I2C_WR_ADDR(pC->uI2CAddress), VPC323XD_FPDAT, buffer, &byteCount)) != RM_OK )
		return s;

	return RM_OK;
}

RMstatus vpc_fpRd(VPC323XD_CONFIG* pC, RMuint16 addx, RMuint16* pData)
{
	RMuint8 buffer[2];
	RMuint32 byteCount = 0;
	RMstatus s;
	
	assert( pC != NULL );
	assert( pData != NULL );
	
	// MSB is sent first, must reorder
	buffer[1] = addx & 0xFF;
	buffer[0] = (addx >> 8) & 0xFF;
	byteCount = 2;
	if( (s = I2Cal_Write_Subaddress( pC->pI2Cal_Context, I2C_WR_ADDR(pC->uI2CAddress), VPC323XD_FPRD, buffer, &byteCount)) != RM_OK )
		return s;

	// MSB first
	byteCount = 2;
	if( (s = I2Cal_Read_Subaddress( pC->pI2Cal_Context, I2C_RD_ADDR(pC->uI2CAddress), VPC323XD_FPDAT, buffer, &byteCount)) != RM_OK )
		return s;
		
	*pData = (buffer[0] << 8) | (buffer[1] & 0xFF);
	//DPRINT(("vpc_fpRd() data = 0x%x\n", *pData));
	return RM_OK;
}

RMstatus vpc_wr(VPC323XD_CONFIG* pC, RMuint8 subAddx, RMuint16 data, RMuint32 byteCount)
{
	RMstatus s;
	RMuint8 buffer[2];
	
	assert( pC != NULL );
	assert( (byteCount == 1) || (byteCount == 2) );
	
	switch( byteCount )
	{
	case 1:
		buffer[0] = data & 0xFF;
		break;
		
	case 2:
		buffer[0] = (data >> 8) & 0xFF;
		buffer[1] = data & 0xFF;
		break;

	default:
		return RM_INVALID_PARAMETER;
		break;
	}
	if( (s = I2Cal_Write_Subaddress( pC->pI2Cal_Context, I2C_WR_ADDR(pC->uI2CAddress), subAddx, buffer, &byteCount)) != RM_OK )
		return s;

	return RM_OK;
}

RMstatus vpc_rd(VPC323XD_CONFIG* pC, RMuint8 subAddx, RMuint16 *pData, RMuint32 byteCount)
{
	RMstatus s;
	RMuint8 buffer[2];
	
	assert( pC != NULL );
	assert( pData != NULL );
	assert( (byteCount == 1) || (byteCount == 2) );

	if( (s = I2Cal_Read_Subaddress( pC->pI2Cal_Context, I2C_RD_ADDR(pC->uI2CAddress), subAddx, buffer, &byteCount)) != RM_OK )
		return s;
	
	//MPRINT(("0x%x 0x%x\n", buffer[0], buffer[1]));
	
	switch( byteCount )
	{
	case 1:
		*pData = buffer[0];
		break;
		
	case 2:
	
		*pData = buffer[0];
	//MPRINT(("0x%x\n", *pData));
		*pData = (*pData) << 8;
	//MPRINT(("0x%x\n", *pData));
		*pData = (*pData) | buffer[1];
	//MPRINT(("0x%x\n", *pData));
		break;
		
	default:
		return RM_ERROR;
		break;
	}
	return RM_OK;
}

RMstatus vpc_send_cmdTable(VPC323XD_CONFIG* pC, VPC_CMD* pTable, RMuint32 byteCount)
{
	RMstatus s;
	RMuint32 index;
	
	assert( pC != NULL );
	assert( pTable != NULL );
	assert( (byteCount % sizeof(VPC_CMD)) == 0 );
	
	for ( index = 0; index < (byteCount / sizeof(VPC_CMD)); index++ )
	{ 
		switch( pTable[index].regLoc )
		{
		case vpc_fp:
			if( (s = vpc_fpWr(pC, pTable[index].data1, pTable[index].data2)) != RM_OK )
				return s;
			break;
		
		case vpc_i2c_8bit:
			if( (s = vpc_wr(pC, pTable[index].data1, pTable[index].data2, 1)) != RM_OK )
				return s;
			break;
			
		case vpc_i2c_16bit:
			if( (s = vpc_wr(pC, pTable[index].data1, pTable[index].data2, 2)) != RM_OK )
				return s;
			break;
			
		case vpc_nolocation:
		default:
			return RM_ERROR;
			break;
		}
	}
	
	return RM_OK;
}

// no more returning S at this level, everything RM_OK or RM_ERROR
RMstatus vpc323xd_init(VPC323XD_CONFIG* pC)
{
	RMstatus s;

	assert( pC != NULL );
	
	switch( pC->nVideoStandard )
	{
	case vpc323xd_vidstd_ntscm:
		if( (s = vpc_send_cmdTable(pC, vpc_init_ntscm, sizeof(vpc_init_ntscm))) != RM_OK )
			return RM_ERROR;
		break;
	
	case vpc323xd_vidstd_autodetect:
		if( (s = vpc_send_cmdTable(pC, vpc_init_ntscpalauto, sizeof(vpc_init_ntscpalauto))) != RM_OK )
			return RM_ERROR;
		break;
		
	default:
		return RM_INVALID_PARAMETER;
		break;
	}
	
	return RM_OK;
}

RMstatus vpc323xd_detect(VPC323XD_CONFIG* pC)
{
	//RMstatus s;
	RMuint16 Data16;
	
	if( vpc_rd(pC, 0x9f, &Data16, 2) != RM_OK )
		return RM_NOT_FOUND;

	DPRINT(("vpc323xd_detect() product code1 = %d, code2 = %d, HW ver = %d\n", (Data16 >> 12) & 0xF, (Data16 >> 8) & 0xF, Data16 & 0xFF));
	
	vpc_fpRd(pC, 0x21, &Data16);
	DPRINT(("fp0x21 data=0x%x\n", Data16));

	vpc_fpRd(pC, 0x30, &Data16);
	DPRINT(("fp0x30 data=0x%x\n", Data16));

		
	vpc_fpRd(pC, 0x17a, &Data16);
	DPRINT(("fp0x17a data=0x%x\n", Data16));
	
	vpc_fpRd(pC, 0x17d, &Data16);
	DPRINT(("fp0x17d data=0x%x\n", Data16));

	/* 
	if( ((Data16 >> 8) & 0xFF) != 0x30 )
		return RM_NOT_FOUND
	*/
	return RM_OK;
}

/*
RMstatus vpc323xd_quick_si(VPC323XD_CONFIG* pC, VPC323XD_INPUT_PORT inport)
{


	if( vpc_fpWr(pC, 0x20, 0x0031) != RM_OK )
		return RM_ERROR;
	
	switch ( inport )
	{
	case vpc323xd_inport_vin1:
		if( vpc_fpWr(pC, 0x21, 0x646) != RM_OK )
			return RM_ERROR;			
		break;

	case vpc323xd_inport_vin2:
		if( vpc_fpWr(pC, 0x21, 0x645) != RM_OK )
			return RM_ERROR;			
		break;

	case vpc323xd_inport_vin3:
		if( vpc_fpWr(pC, 0x21, 0x644) != RM_OK )
			return RM_ERROR;			
		break;

	case vpc323xd_inport_vin4:
		if( vpc_fpWr(pC, 0x21, 0x647) != RM_OK )
			return RM_ERROR;			
		break;

	default:
		return RM_INVALID_PARAMETER;
		break;
	}
		
	return RM_OK;
}
*/

RMstatus vpc323xd_select_input(VPC323XD_CONFIG* pC, VPC323XD_INPUT_TYPE intype, VPC323XD_INPUT_PORT inport)
{
	RMuint32 i;
	RMuint16 data16;
	RMuint32 timeout;

	assert( pC != NULL );
	timeout = pC->uVpcTimeoutMs * 10;
	
		
	if( pC->nVideoStandard == vpc323xd_vidstd_autodetect )
	{
		// turn off automatic detection
		if( vpc_fpWr(pC, 0x148, 0x800) != RM_OK )
			return RM_ERROR;
	}
	
	/*for ( i = 0; i < timeout; i++ )
	{
		if( vpc_fpRd( pC, 0x148, &data16 ) != RM_OK )
			return RM_ERROR;
			
		if( (data16 & (0x01 << 11)) == 0 )
			break;
			
		usleep(100);
	}
	
	if( i >= timeout )
	{
		DPRINT(("!vpc323xd_select_input() fp timeout turning off automatic standard detection\n"));
		return RM_ERROR;
	}*/

	// select the input type
	switch( intype )
	{
	case vpc323xd_intype_composite:	
		if( vpc_wr(pC, 0x95, 0xe0, 1) != RM_OK )
			return RM_ERROR;
		
		// standard selection, ntsc M, composite, 4-H comb
		if( vpc_fpWr(pC, 0x20, 0x021) != RM_OK )
			return RM_ERROR;
			
		break;
		
	case vpc323xd_intype_svideo:
		// softmixer to select video to out
		if( vpc_wr(pC, 0x95, 0xe0, 1) != RM_OK )
			return RM_ERROR;
		
		// standard selection, ntsc M, comb filter active
		if( vpc_fpWr(pC, 0x20, 0x041) != RM_OK )
			return RM_ERROR;
		break;
		
	case vpc323xd_intype_component_yuv:
	case vpc323xd_intype_component_rgb:
		// softmixer to select rgb/yuv block
		if( vpc_wr(pC, 0x95, 0x20, 1) != RM_OK )
			return RM_ERROR;
		
		// standard selection, ntsc M, composite, 4-H comb
		if( vpc_fpWr(pC, 0x20, 0x021) != RM_OK )
			return RM_ERROR;
		break;
	
	default:
		return RM_INVALID_PARAMETER;
		break;
	}
	

	// select the port	
	switch( intype )
	{
	case vpc323xd_intype_composite:	
	case vpc323xd_intype_svideo:
		switch ( inport )
		{
		case vpc323xd_inport_vin1:
			if( vpc_fpWr(pC, 0x21, 0x646) != RM_OK )
				return RM_ERROR;			
			break;
			
		case vpc323xd_inport_vin2:
			if( vpc_fpWr(pC, 0x21, 0x645) != RM_OK )
				return RM_ERROR;			
			break;
			
		case vpc323xd_inport_vin3:
			if( vpc_fpWr(pC, 0x21, 0x644) != RM_OK )
				return RM_ERROR;			
			break;
			
		case vpc323xd_inport_vin4:
			if( vpc_fpWr(pC, 0x21, 0x647) != RM_OK )
				return RM_ERROR;			
			break;
			
		default:
			return RM_INVALID_PARAMETER;
			break;
		}
		break;

	case vpc323xd_intype_component_yuv:
	case vpc323xd_intype_component_rgb:
		if( vpc_rd( pC, 0x96, &data16, 1 ) != RM_OK )
			return RM_ERROR;
		
		// select component port and type
		if( intype == vpc323xd_intype_component_yuv )
			data16 = data16 | (0x01 << 7);
		else // rgb
			data16 = data16 & (~(0x01<< 7));
			
		switch( inport )
		{
		case vpc323xd_inport_component1_vin4:
			data16 = data16 & (~(0x01 << 2));
			break;
			
		case vpc323xd_inport_component2_vin4:
			data16 = data16 | (0x01 << 2);
			break;
		
		default:
			return RM_INVALID_PARAMETER;
			break;
		}
		if( vpc_wr( pC, 0x96, data16, 1 ) != RM_OK )
			return RM_ERROR;

		// set the Y to go to VIN4
		// this is a hardware connection also
		if( vpc_fpWr(pC, 0x21, 0x647) != RM_OK )
			return RM_ERROR;			
		break;
	
	default:
		// should not happen
		assert(0);
		return RM_INVALID_PARAMETER;
		break;	
	}
	
	// see that the FP completes 0x20 and 0x21	
	for ( i = 0; i < timeout; i++ )
	{
		if( vpc_fpRd( pC, 0x20, &data16 ) != RM_OK )
			return RM_ERROR;
			
		if( data16 & (0x01 << 11) )
		{
			if( vpc_fpRd( pC, 0x21, &data16 ) != RM_OK )
				return RM_ERROR;
		
			if( data16 & (0x01 << 11) )
				break;
		}
			
		mum_usleep(100);
	}
	
	
	if( i >= timeout )
	{
		DPRINT(("!vpc323xd_select_input() fp timeout changing standard and input\n"));
		return RM_ERROR;
	}

	if( pC->nVideoStandard == vpc323xd_vidstd_autodetect )
	{
		// re-enable automatic detection
		if( vpc_fpWr(pC, 0x148, 0x803) != RM_OK )
			return RM_ERROR;
	}
	
	return RM_OK;
}


RMstatus vpc323xd_getStandardDetectStatus ( VPC323XD_CONFIG* pC, VPC323XD_STDDETECT_STATUS* p_nStatus)
{
	RMuint16 data16;

	assert( pC != NULL );
	assert( p_nStatus != NULL );
	
	if( pC->nVideoStandard != vpc323xd_vidstd_autodetect )
		return RM_ERROR;
		
	if( vpc_fpRd( pC, 0x14e, &data16) != RM_OK )
	{
		DPRINT(("vpc323xd_getStandardDetectStatus() vpc_fpRd(0x14e) error\n"));
		return RM_ERROR;
	}
	
	if( data16 == 0x20 )
	{
		*p_nStatus = vpc323xd_stddet_switched;
		return RM_OK;
	}
	else if ( data16 == 0x00 )
	{
		*p_nStatus = vpc323xd_stddet_ok;
		return RM_OK;	
	}
	else if ( (data16 & 0x1F) == 0x01 )
	{
		*p_nStatus = vpc323xd_stddet_nostart_noinput; // or SECAM L
		return RM_OK;	
	}
	else if ( (data16 & 0x1F) == 0x02 )
	{
		*p_nStatus = vpc323xd_stddet_nostart_vertstd_notsupported;
		return RM_OK;	
	}
	else if ( (data16 & 0x1F) == 0x14 )
	{
		*p_nStatus = vpc323xd_stddet_nocolor;
		return RM_OK;	
	}
	else if( (data16 & 0x15) == 0x04 )   // 0x1x0
	{
		*p_nStatus = vpc323xd_stddet_searching;
		return RM_OK;	
	}
	else if( (data16 & 0x1B) == 0x08 )
	{
		*p_nStatus = vpc323xd_stddet_failed_incorrect;
		return RM_OK;	
	}
	else if( (data16 & 0x1B) == 0x08 )
	{
		*p_nStatus = vpc323xd_stddet_failed_notenabled;	// detected color not enabled
		return RM_OK;	
	}
	else
	{
		DPRINT(("vpc323xd_getStandardDetectStatus() vpc_fpRd(0x14e) unknown data =0x%x\n", data16));
		return RM_ERROR;
	}
}