📄 at91_cstartup.lst
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# #
###############################################################################
85 00000000
86 00000000
87 00000000 ;-----------------------------------------------
----------------
88 00000000 ; ?BOOT
89 00000000 ;-----------------------------------------------
----------------
90 00000000 MODULE ?BOOT
91 00000000 RSEG ICODE:CODE:NOROOT(2)
92 00000000 EXTERN ?cstartup
93 00000000 CODE32
94 00000000 PUBLIC ?boot
95 00000000 ?boot:
96 00000000 #if AT91_REMAP
135 00000000 #endif
136 00000000 ; Execute C startup code.
137 00000000 ........ b ?cstartup
138 00000004 ENDMOD ?boot ; Entry
point = ?boot
##############################
# CRC:BEE4 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 4 #
##############################
###############################################################################
# #
# IAR Systems ARM Assembler V4.42A/W32 09/Sep/2008 07:54:46 #
# Copyright 1999-2007 IAR Systems. All rights reserved. #
# #
# Source file = E:\AT91EBxx\at91_cstartup.s79 #
# List file = E:\AT91EBxx\ramcode-EBxx\List\at91_cstartup.lst #
# Object file = E:\AT91EBxx\ramcode-EBxx\Obj\at91_cstartup.r79 #
# Command line = E:\AT91EBxx\at91_cstartup.s79 #
# -OE:\AT91EBxx\ramcode-EBxx\Obj\ -s+ -M<> -w+ -r #
# -DRAMCODE=1 -LE:\AT91EBxx\ramcode-EBxx\List\ #
# -t8 --cpu ARM7TDMI --fpu None #
# -IC:\Program Files\IAR Systems\Embedded Workbench 4.0 Evaluation\arm\INC\ #
# #
###############################################################################
139 00000000
140 00000000
141 00000000 ;-----------------------------------------------
----------------
142 00000000 ; ?CSTARTUP
143 00000000 ;-----------------------------------------------
----------------
144 00000000 MODULE ?CSTARTUP
145 00000000
146 00000000 RSEG IRQ_STACK:DATA(2)
147 00000000 RSEG SVC_STACK:DATA:NOROOT(2)
148 00000000 RSEG CSTACK:DATA(2)
149 00000000 RSEG ICODE:CODE:NOROOT(2)
150 00000000 PUBLIC ?cstartup
151 00000000 EXTERN ?main
152 00000000
153 00000000 ; Execution starts here.
154 00000000 ; After a reset, the mode is ARM, Supervisor,
interrupts disabled.
155 00000000
156 00000000
157 00000000 CODE32
158 00000000 ?cstartup
159 00000000
160 00000000 ; Add initialization nedded before setup of
stackpointers here
161 00000000
162 00000000
163 00000000 ; Initialize the stack pointers.
164 00000000 ; The pattern below can be used for any of the
exception stacks:
165 00000000 ; FIQ, IRQ, SVC, ABT, UND, SYS.
166 00000000 ; The USR mode uses the same stack as SYS.
167 00000000 ; The stack segments must be defined in the
linker command file,
168 00000000 ; and be declared above.
169 00000000 00000FE1 mrs r0,cpsr
;
Original PSR
value
170 00000004 1F00C0E3 bic r0,r0,#MODE_BITS
; Clear
the mode bits
171 00000008 120080E3 orr r0,r0,#IRQ_MODE
; Set IRQ
mode bits
172 0000000C 00F021E1 msr cpsr_c,r0
;
Change the
mode
173 00000010 14D09FE5 ldr sp,=SFE(IRQ_STACK) &
0xFFFFFFF8 ; End
of IRQ_STACK
174 00000014
175 00000014 1F00C0E3 bic r0,r0,#MODE_BITS
; Clear
the mode bits
176 00000018 130080E3 orr r0,r0,#SVC_MODE
; Set SVC
mode bits
177 0000001C 00F021E1 msr cpsr_c,r0
;
Change the
mode
178 00000020 08D09FE5 ldr sp,=SFE(CSTACK) &
0xFFFFFFF8 ;
End of CSTACK
179 00000024
180 00000024 #ifdef __ARMVFP__
190 00000024 #endif
191 00000024
192 00000024 ; Add more initialization here
193 00000024
194 00000024
195 00000024 ; Continue to ?main for more IAR specific system
startup
196 00000024
197 00000024 08009FE5 ldr r0,=?main
198 00000028 10FF2FE1 bx r0
199 0000002C
200 0000002C LTORG
200.1 0000002C TABLE
200.2 0000002C ........ Reference on line 173
200.3 00000030 ........ Reference on line 178
200.4 00000034 ........ Reference on line 197
200 00000038 LTORG
201 00000038
202 00000038 ENDMOD
##############################
# CRC:82A4 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 56 #
##############################
##############################
# CRC:82A4 #
# Errors: 0 #
# Warnings: 0 #
# Bytes: 56 #
# Modules: 3 #
# Total errors: 0 #
# Total warnings: 0 #
##############################
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