cache.h

来自「this SRC packet is the headfiles that MI」· C头文件 代码 · 共 11 行

#ifndef _ASM_CACHE_H
#define _ASM_CACHE_H

/* Etrax 100LX have 32-byte cache-lines. When we add support for future chips
 * here should be a check for CPU type.
 */

#define L1_CACHE_BYTES 32

#endif /* _ASM_CACHE_H */