_primary.vhd
来自「用Verilog 实现将比特流数据转化为SPI协议数据的适配器」· VHDL 代码 · 共 19 行
VHD
19 行
library verilog;use verilog.vl_types.all;entity BarkerCodeDecision is generic( S_WaitforAdder : integer := 1; S_DotheAddition : integer := 2; S_BarkerDecision: integer := 4; S_IDLE : integer := 8; BARKERCODE : integer := 7989 ); port( Clock50MHz : in vl_logic; RST : in vl_logic; SampleCLK : in vl_logic; DatafromSRC : in vl_logic_vector(12 downto 0); BarkerFlag : out vl_logic );end BarkerCodeDecision;
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?