device.cpp

扬创yc2440-t2-dm9000 ce 5.0 bsp

void	NIC_DEVICE_OBJECT::DeviceReportStatistics(
	U32		uEvent,
	U32		uValue)
{

	if(uEvent >= TID_SIZE) return;
	m_szStatistics[uEvent] += uValue;
}
static NDIS_STRING Mac_szName[]={NDIS_STRING_CONST("UseSoftwareMac"),NDIS_STRING_CONST("SoftwareMacAddress0"),
			NDIS_STRING_CONST("SoftwareMacAddress1"),NDIS_STRING_CONST("SoftwareMacAddress2"),NDIS_STRING_CONST("SoftwareMacAddress3"),
			NDIS_STRING_CONST("SoftwareMacAddress4"),NDIS_STRING_CONST("SoftwareMacAddress5")};


void	NIC_DEVICE_OBJECT::DeviceRetriveConfigurations(
	NDIS_HANDLE		hConfig)
{
	NDIS_STATUS	status;

	PCONFIG_PARAMETER	pconfig;
	
	PNDIS_CONFIGURATION_PARAMETER	param;

	for(pconfig=DeviceConfigureParameters();
		(pconfig->uId != (U32)-1);
		pconfig++)
	{
		NdisReadConfiguration(
			&status,
			&param,
			hConfig,
			&(pconfig->szName),
			NdisParameterHexInteger);
		if(status == NDIS_STATUS_SUCCESS)
			m_szConfigures[pconfig->uId] = 
				param->ParameterData.IntegerData;
		else
			m_szConfigures[pconfig->uId] = pconfig->uDefValue;
	}
	NdisReadConfiguration(
			&status,
			&param,
			hConfig,
			&Mac_szName[0],
			NdisParameterHexInteger);
		if(status == NDIS_STATUS_SUCCESS)
			UseSoftMac = 
				param->ParameterData.IntegerData;
	if(UseSoftMac)
	{
		for(int i=0;i<6;i++)
		{
	NdisReadConfiguration(
			&status,
			&param,
			hConfig,
			&Mac_szName[i+1],
			NdisParameterHexInteger);
		if(status == NDIS_STATUS_SUCCESS)
			SoftMac[i] = 
				param->ParameterData.IntegerData;
			}
	}
}

void	NIC_DEVICE_OBJECT::DeviceSetDefaultSettings(void)
{
	m_szConfigures[CID_CHIP_STEPPING] = 0;

	m_szConfigures[CID_INTERMEDIATE] = 0;
	m_szConfigures[CID_NEED_IO_SPACE] = 1;
	m_szConfigures[CID_NEED_INTERRUPT] = 1;
	
	m_szCurrentSettings[SID_PHY_NUMBER] = MII_INTERNAL_PHY_ADDR;
	m_szCurrentSettings[SID_HW_STATUS] = NdisHardwareStatusReady;
	m_szCurrentSettings[SID_MEDIA_SUPPORTED] = NdisMedium802_3;
	m_szCurrentSettings[SID_MEDIA_IN_USE] = NdisMedium802_3;
	m_szCurrentSettings[SID_MEDIA_CONNECTION_STATUS] = NdisMediaStateConnected;
	m_szCurrentSettings[SID_OP_MODE] = 0;
	
	m_szCurrentSettings[SID_MAXIMUM_LOOKAHEAD] = ETH_MAX_FRAME_SIZE;
	m_szCurrentSettings[SID_MAXIMUM_FRAME_SIZE] = ETH_MAX_FRAME_SIZE - ETH_HEADER_SIZE;
    m_szCurrentSettings[SID_MAXIMUM_TOTAL_SIZE] = ETH_MAX_FRAME_SIZE;
    m_szCurrentSettings[SID_BUFFER_SIZE] = DRIVER_BUFFER_SIZE;
    m_szCurrentSettings[SID_MAXIMUM_SEND_PACKETS] = 1;
	m_szCurrentSettings[SID_LINK_SPEED] = 100000;

	m_szCurrentSettings[SID_GEN_MAC_OPTIONS] =
		NDIS_MAC_OPTION_TRANSFERS_NOT_PEND
		| NDIS_MAC_OPTION_COPY_LOOKAHEAD_DATA
		| NDIS_MAC_OPTION_RECEIVE_SERIALIZED
		| NDIS_MAC_OPTION_NO_LOOPBACK;
	
	m_szCurrentSettings[SID_GEN_CURRENT_PACKET_FILTER] = 0; 
	m_szCurrentSettings[SID_GEN_TRANSMIT_BUFFER_SPACE] = 
		m_szConfigures[CID_TXBUFFER_NUMBER]
		* ETH_MAX_FRAME_SIZE;
	m_szCurrentSettings[SID_GEN_RECEIVE_BUFFER_SPACE] = 
		m_szConfigures[CID_RXBUFFER_NUMBER]
		* ETH_MAX_FRAME_SIZE;
	m_szCurrentSettings[SID_GEN_TRANSMIT_BLOCK_SIZE] = ETH_MAX_FRAME_SIZE;
	m_szCurrentSettings[SID_GEN_RECEIVE_BLOCK_SIZE] = ETH_MAX_FRAME_SIZE;
	m_szCurrentSettings[SID_GEN_CURRENT_LOOKAHEAD] = ETH_MAX_FRAME_SIZE;
	m_szCurrentSettings[SID_GEN_DRIVER_VERSION] = 
		(PRJ_NDIS_MAJOR_VERSION << 8) | PRJ_NDIS_MINOR_VERSION;
	m_szCurrentSettings[SID_GEN_VENDOR_DRIVER_VERSION] = 0x01010000; 
	m_szCurrentSettings[SID_GEN_PROTOCOL_OPTIONS] = 0;

}

void	NIC_DEVICE_OBJECT::EDeviceRegisterIoSpace(void)
{
	if(!m_szConfigures[CID_NEED_IO_SPACE]) return;

#if OLD_MAPPING_STYLE
	NDIS_STATUS	status;
	if((status = NdisMRegisterIoPortRange(
		(PVOID*)&m_szCurrentSettings[SID_PORT_BASE_ADDRESS],
		m_pUpper->GetNdisHandle(),
		m_szConfigures[CID_IO_BASE_ADDRESS],
		m_szConfigures[CID_IO_RANGE])) != NDIS_STATUS_SUCCESS)	
		THROW((status));
		PULONG BusBase;
		PHYSICAL_ADDRESS PhysicalIoBase;
#endif

	U32		uBase;
	PHYSICAL_ADDRESS	phyAddr;
	
	phyAddr.HighPart = 0;
	phyAddr.LowPart = m_szConfigures[CID_IO_BASE_ADDRESS];
	
	DEBUG_PRINT((
		TEXT("[dm9: Tries to map io space with %X\r\n"), phyAddr.LowPart
		));
		
	if(!(uBase = (U32)MmMapIoSpace(phyAddr, 16, FALSE)))
		THROW((ERR_STRING("Fails to map io space")));
		
	DEBUG_PRINT((
		TEXT("[dm9: The mapped address is %X\r\n"), uBase
		));	
		
	m_szCurrentSettings[SID_PORT_BASE_ADDRESS] = uBase;	

}		

void	NIC_DEVICE_OBJECT::EDeviceRegisterInterrupt(void)
{
	if(!m_szConfigures[CID_NEED_INTERRUPT]) return;

	NDIS_STATUS	status;
	if((status=NdisMRegisterInterrupt(
		&m_InterruptHandle,
		m_pUpper->GetNdisHandle(),
		m_szConfigures[CID_IRQ_NUMBER],	// or say, irq vector
		m_szConfigures[CID_IRQ_LEVEL],	// irql level
		TRUE,		// request ISR
		(BOOLEAN)m_szConfigures[CID_IRQ_SHARED],		// shared interrupt
		(KINTERRUPT_MODE)m_szConfigures[CID_IRQ_GEN_TYPE])) != NDIS_STATUS_SUCCESS)	
		THROW((ERR_STRING("Error in registering interrupt"),status));
}


void	NIC_DEVICE_OBJECT::EDeviceLoadEeprom(void)
{
	int		n;
	EEPROM_DATA_TYPE	*pcurr=(EEPROM_DATA_TYPE*)&m_szEeprom[0];

	for(n=0;n<(DIM(m_szEeprom)/sizeof(EEPROM_DATA_TYPE));n++,pcurr++)
	{
		*pcurr = DeviceReadEeprom(n);

	} // of for offset n
	
	DeviceCalculateCRC32(&m_szEeprom[0],DIM(m_szEeprom)-2);
}

BOOL	NIC_DEVICE_OBJECT::DevicePolling(
	U32		uPort,
	U32		uMask,
	U32		uExpected,
	U32		uInterval,	/* in millisecond */
	U32		uRetries)
{
	for(;uRetries;uRetries--)
	{
		if((DeviceReadPort(uPort) & uMask) == uExpected) break;
		NdisStallExecution(uInterval);
	} // of retry loop
	
	return (BOOL)uRetries;
}

BOOL	NIC_DEVICE_OBJECT::DeviceCheckForHang(void)
{

	U32	cr;

	cr = DeviceGetReceiveStatus();
	
	U32	rxps,rxci;
	
	rxps = cr >> 31;
	rxci = cr & 0x7FFFFFFF;

	REPORT(TID_NIC_RXPS,rxps);	
	REPORT(TID_NIC_RXCI,rxci);	

#ifndef	IMPL_RESET
	return FALSE;
#endif

	U32	lastread = m_szLastStatistics[TID_GEN_RCV_OK];
	U32	lastsent = m_szLastStatistics[TID_GEN_XMIT_OK];

	memcpy(
		(void*)&m_szLastStatistics,
		(void*)&m_szStatistics,
		sizeof(m_szStatistics));

	// report hang if 
	// 1. receive count stalled but overflow, or
	if((m_szStatistics[TID_GEN_RCV_OK] == lastread) && cr) 
		return TRUE;
	
	// 2. tx idle while tqueue out of resource
	if(m_pUpper->DriverIsOutOfResource() &&
		(DeviceHardwareStatus() & NIC_HW_TX_IDLE) ) 
	{
		return TRUE;
	}
	return FALSE;
}

/*******************************************************************************
 *
 * Device timer routine
 *
 ********************************************************************************/

extern "C" void	DeviceTimerTrunkRoutine(
    IN PVOID SystemSpecific1,
    IN PVOID FunctionContext,
    IN PVOID SystemSpecific2,
    IN PVOID SystemSpecific3)
{
	NIC_DEVICE_OBJECT	*dev = (NIC_DEVICE_OBJECT*)FunctionContext;

	if(!dev->m_mutexTimer.TryLock()) return;
	dev->DeviceOnTimer();
	dev->m_mutexTimer.Release();
}


void	NIC_DEVICE_OBJECT::DeviceInitializeTimer(void)
{
	NdisMInitializeTimer(
		&m_timerObject,
		m_pUpper->GetNdisHandle(),
		(PNDIS_TIMER_FUNCTION)DeviceTimerTrunkRoutine,
		(PVOID)this);
}

void	NIC_DEVICE_OBJECT::DeviceCancelTimer(void)
{
	BOOLEAN	result;
	NdisMCancelTimer(
		&m_timerObject,
		&result);
}

void	NIC_DEVICE_OBJECT::DeviceSetTimer(
	U32 milliseconds)
{
	NdisMSetTimer(&m_timerObject,milliseconds);
}

void	NIC_DEVICE_OBJECT::DeviceOnTimer(void)
{
}