📄 2.4g+̤
字号:
0280 .dbline 399
0280 ; SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
0280 28E2 ldi R18,40
0282 05E2 ldi R16,37
0284 9FDF rcall _SPI_RW_Reg
0286 .dbline 400
0286 ; SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
0286 24E1 ldi R18,20
0288 01E3 ldi R16,49
028A 9CDF rcall _SPI_RW_Reg
028C .dbline 401
028C ; SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
028C 27E0 ldi R18,7
028E 06E2 ldi R16,38
0290 99DF rcall _SPI_RW_Reg
0292 .dbline 402
0292 ; SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..
0292 2FE0 ldi R18,15
0294 00E2 ldi R16,32
0296 96DF rcall _SPI_RW_Reg
0298 .dbline 403
0298 ; nRF24L01_CEH;
0298 5D9A sbi 0xb,5
029A .dbline 404
029A ; delay();
029A 64DF rcall _delay
029C .dbline -2
029C L62:
029C 2196 adiw R28,1
029E .dbline 0 ; func end
029E 0895 ret
02A0 .dbend
02A0 .dbfunc e TX_Mode _TX_Mode fV
.even
02A0 _TX_Mode::
02A0 2197 sbiw R28,1
02A2 .dbline -1
02A2 .dbline 424
02A2 ; // This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
02A2 ; // '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
02A2 ;
02A2 ; }
02A2 ; /**************************************************/
02A2 ;
02A2 ; /**************************************************
02A2 ; Function: TX_Mode();
02A2 ;
02A2 ; Description:
02A2 ; This function initializes one nRF24L01 device to
02A2 ; TX mode, set TX address, set RX address for auto.ack,
02A2 ; fill TX payload, select RF channel, datarate & TX pwr.
02A2 ; PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
02A2 ;
02A2 ; ToDo: One high pulse(>10us) on CE will now send this
02A2 ; packet and expext an acknowledgment from the RX device. */
02A2 ; /**************************************************/
02A2 ; void TX_Mode(void)
02A2 ; {
02A2 .dbline 425
02A2 ; nRF24L01_CEL;
02A2 5D98 cbi 0xb,5
02A4 .dbline 426
02A4 ; delay();
02A4 5FDF rcall _delay
02A6 .dbline 427
02A6 ; SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH); // Writes TX_Address to nRF24L01
02A6 85E0 ldi R24,5
02A8 8883 std y+0,R24
02AA 20E0 ldi R18,<_TX_ADDRESS
02AC 30E0 ldi R19,>_TX_ADDRESS
02AE 00E3 ldi R16,48
02B0 C0DF rcall _SPI_Write_Buf
02B2 .dbline 428
02B2 ; SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
02B2 85E0 ldi R24,5
02B4 8883 std y+0,R24
02B6 20E0 ldi R18,<_TX_ADDRESS
02B8 30E0 ldi R19,>_TX_ADDRESS
02BA 0AE2 ldi R16,42
02BC BADF rcall _SPI_Write_Buf
02BE .dbline 429
02BE ; SPI_Write_Buf(WR_TX_PLOAD, Buffer, TX_PLOAD_WIDTH); // Writes data to TX payload
02BE 84E1 ldi R24,20
02C0 8883 std y+0,R24
02C2 20E0 ldi R18,<_Buffer
02C4 30E0 ldi R19,>_Buffer
02C6 00EA ldi R16,160
02C8 B4DF rcall _SPI_Write_Buf
02CA .dbline 431
02CA ;
02CA ; SPI_RW_Reg(WRITE_REG + EN_AA, 0x01); // Enable Auto.Ack:Pipe0
02CA 21E0 ldi R18,1
02CC 01E2 ldi R16,33
02CE 7ADF rcall _SPI_RW_Reg
02D0 .dbline 432
02D0 ; SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01); // Enable Pipe0
02D0 21E0 ldi R18,1
02D2 02E2 ldi R16,34
02D4 77DF rcall _SPI_RW_Reg
02D6 .dbline 433
02D6 ; SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
02D6 2AE1 ldi R18,26
02D8 04E2 ldi R16,36
02DA 74DF rcall _SPI_RW_Reg
02DC .dbline 434
02DC ; SPI_RW_Reg(WRITE_REG + RF_CH, 40); // Select RF channel 40
02DC 28E2 ldi R18,40
02DE 05E2 ldi R16,37
02E0 71DF rcall _SPI_RW_Reg
02E2 .dbline 435
02E2 ; SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
02E2 27E0 ldi R18,7
02E4 06E2 ldi R16,38
02E6 6EDF rcall _SPI_RW_Reg
02E8 .dbline 436
02E8 ; SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
02E8 2EE0 ldi R18,14
02EA 00E2 ldi R16,32
02EC 6BDF rcall _SPI_RW_Reg
02EE .dbline 437
02EE ; nRF24L01_CEH;
02EE 5D9A sbi 0xb,5
02F0 .dbline 438
02F0 ; delay();
02F0 39DF rcall _delay
02F2 .dbline -2
02F2 L63:
02F2 2196 adiw R28,1
02F4 .dbline 0 ; func end
02F4 0895 ret
02F6 .dbend
02F6 .dbfunc e timer0_init _timer0_init fV
.even
02F6 _timer0_init::
02F6 .dbline -1
02F6 .dbline 443
02F6 ;
02F6 ; }
02F6 ; //------------------------------------------------------
02F6 ; void timer0_init(void)
02F6 ; {
02F6 .dbline 444
02F6 ; TCCR0B = 0x00; //stop
02F6 2224 clr R2
02F8 25BC out 0x25,R2
02FA .dbline 445
02FA ; TCNT0 = 0x06; //set count
02FA 86E0 ldi R24,6
02FC 86BD out 0x26,R24
02FE .dbline 446
02FE ; TCCR0A = 0x00;
02FE 24BC out 0x24,R2
0300 .dbline 447
0300 ; TCCR0B = 0x02; //start timer
0300 82E0 ldi R24,2
0302 85BD out 0x25,R24
0304 .dbline -2
0304 L64:
0304 .dbline 0 ; func end
0304 0895 ret
0306 .dbend
.area vector(rom, abs)
.org 32
0020 83C1 rjmp _timer0_ovf_isr
.area text(rom, con, rel)
0306 .dbfile E:\项目\PS2无~1\progamme\sendavrnrf24l01\sendavrnrf24l01\main.c
0306 .dbfunc e timer0_ovf_isr _timer0_ovf_isr fV
.even
0306 _timer0_ovf_isr::
0306 2A92 st -y,R2
0308 3A92 st -y,R3
030A 8A93 st -y,R24
030C 9A93 st -y,R25
030E 2FB6 in R2,0x3f
0310 2A92 st -y,R2
0312 .dbline -1
0312 .dbline 451
0312 ; }
0312 ; #pragma interrupt_handler timer0_ovf_isr:17
0312 ; void timer0_ovf_isr(void) // 5ms
0312 ; {
0312 .dbline 453
0312 ;
0312 ; TCNT0 = 0x06; //reload counter value
0312 86E0 ldi R24,6
0314 86BD out 0x26,R24
0316 .dbline 455
0316 ;
0316 ; if((--t20ms)==0)
0316 80911A00 lds R24,_t20ms
031A 8150 subi R24,1
031C 282E mov R2,R24
031E 20921A00 sts _t20ms,R2
0322 8823 tst R24
0324 09F0 breq X2
0326 03C2 rjmp L66
0328 X2:
0328 .dbline 456
0328 ; {
0328 .dbline 457
0328 ; set(flag,bit20ms);
0328 .dbline 457
0328 80911900 lds R24,_flag
032C 8160 ori R24,1
032E 80931900 sts _flag,R24
0332 .dbline 457
0332 .dbline 457
0332 .dbline 458
0332 ; t20ms=t20msC;
0332 84E1 ldi R24,20
0334 80931A00 sts _t20ms,R24
0338 .dbline 459
0338 ; if(PIND& key1)
0338 4C9B sbis 0x9,4
033A 09C0 rjmp L68
033C .dbline 460
033C ; {
033C .dbline 461
033C ; key1_pulse<<=1;
033C 20901800 lds R2,_key1_pulse
0340 220C lsl R2
0342 20921800 sts _key1_pulse,R2
0346 .dbline 462
0346 ; key1_pulse&=0xfe;
0346 822D mov R24,R2
0348 8E7F andi R24,254
034A 80931800 sts _key1_pulse,R24
034E .dbline 463
034E ; }
034E L68:
034E .dbline 464
034E ; if(!(PIND& key1))
034E 4C99 sbic 0x9,4
0350 09C0 rjmp L70
0352 .dbline 465
0352 ; {
0352 .dbline 466
0352 ; key1_pulse<<=1;
0352 20901800 lds R2,_key1_pulse
0356 220C lsl R2
0358 20921800 sts _key1_pulse,R2
035C .dbline 467
035C ; key1_pulse|=0x01;
035C 822D mov R24,R2
035E 8160 ori R24,1
0360 80931800 sts _key1_pulse,R24
0364 .dbline 468
0364 ; }
0364 L70:
0364 .dbline 469
0364 ; if(key1_pulse==0x0f)
0364 80911800 lds R24,_key1_pulse
0368 8F30 cpi R24,15
036A 59F4 brne L72
036C .dbline 470
036C ; {
036C .dbline 471
036C ; key1_flag=1;
036C 81E0 ldi R24,1
036E 80931000 sts _key1_flag,R24
0372 .dbline 472
0372 ; send_flag=1;
0372 80934600 sts _send_flag,R24
0376 .dbline 473
0376 ; accept_time=0;
0376 2224 clr R2
0378 3324 clr R3
037A 30924800 sts _accept_time+1,R3
037E 20924700 sts _accept_time,R2
0382 .dbline 474
0382 ; }
0382 L72:
0382 .dbline 475
0382 ; if(key1_pulse==0xff)
0382 80911800 lds R24,_key1_pulse
0386 8F3F cpi R24,255
0388 B9F4 brne L74
038A .dbline 476
038A ; {
038A .dbline 477
038A ; key1_time++;
038A 80910700 lds R24,_key1_time
038E 8F5F subi R24,255 ; addi 1
0390 80930700 sts _key1_time,R24
0394 .dbline 478
0394 ; if(key1_time>10)
0394 8AE0 ldi R24,10
0396 20900700 lds R2,_key1_time
039A 8215 cp R24,R2
039C 68F4 brsh L76
039E .dbline 479
039E ; {
039E .dbline 480
039E ; key1_time=0;
039E 2224 ⌨️ 快捷键说明
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