main.lst

ARM开发例程,KEIL_ARM编译环境.

ARM COMPILER V2.50a,  main                                                                 31/01/08  10:01:21  PAGE 1   


ARM COMPILER V2.50a, COMPILATION OF MODULE main
OBJECT MODULE PLACED IN main.OBJ
COMPILER INVOKED BY: d:\Keil\ARM\BIN\CA.exe main.c ARM BROWSE DEBUG TABS(4) 

stmt  level    source

    1          #include <math.h>
    2          #include <LPC213X.H>
    3          void init_timer (void);
    4           
    5          void main(void)
    6          {
    7   1          unsigned int val;
    8   1          unsigned char index,loop;
    9   1          VPBDIV = 0x02;                          //Set the Pclk to 30 Mhz
   10   1          IODIR1 = 0x00FF0000;                    // P1.16..23 defined as Outputs  
   11   1          AD0CR  = 0x00250601;                    // Setup A/D: 10-bit AIN0 @ 3MHz 
   12   1          AD0CR  |= 0x01000000;                   // Start A/D Conversion 
   13   1      
   14   1          while(1)
   15   1          {
   16   2              for(index = 0;index < 80;index++)
   17   2              {         
   18   3                  do
   19   3                  {
   20   4                      val         = AD0DR;            // Read A/D Data Register 
   21   4                  }        
   22   3                  while ((val & 0x80000000) == 0);    //Wait for the conversion to complete
   23   3      
   24   3                  DACR            = val;
   25   3              }  
   26   2          }
   27   1      }
*** WARNING C47 IN LINE 8 OF MAIN.C: 'loop': unreferenced local variable
   28          
ARM COMPILER V2.50a,  main                                                                 31/01/08  10:01:21  PAGE 2   

ASSEMBLY LISTING OF GENERATED OBJECT CODE



*** EXTERNALS:
 EXTERN NUMBER (__startup)



*** PUBLICS:
 PUBLIC         main



*** CODE SEGMENT '?PR?main?main':
    5: void main(void)
 00000000  E92D4000  STMDB       R13!,{LR}
    6: {
 00000004            ; SCOPE-START
    9:     VPBDIV = 0x02;                          //Set the Pclk to 30 Mhz
 00000004  E3A01002  MOV         R1,#0x2
 00000008  E5100000  LDR         R0,=0xE01FC100
 0000000C  E5C01000  STRB        R1,[R0,#0x0]
   10:     IODIR1 = 0x00FF0000;                    // P1.16..23 defined as Outputs  
 00000010  E3A018FF  MOV         R1,#0xFF0000
 00000014  E5100000  LDR         R0,=0xE0028018
 00000018  E5801000  STR         R1,[R0,#0x0]
   11:     AD0CR  = 0x00250601;                    // Setup A/D: 10-bit AIN0 @ 3MHz 
 0000001C  E5101000  LDR         R1,=0x250601
 00000020  E5100000  LDR         R0,=0xE0034000
 00000024  E5801000  STR         R1,[R0,#0x0]
   12:     AD0CR  |= 0x01000000;                   // Start A/D Conversion 
 00000028  E5100000  LDR         R0,=0xE0034000
 0000002C  E5901000  LDR         R1,[R0,#0x0]
 00000030  E3811401  ORR         R1,R1,#0x1000000
 00000034  E5801000  STR         R1,[R0,#0x0]
   16:         for(index = 0;index < 80;index++)
 00000038          L_9:
 00000038  E3A00000  MOV         R0,#0x0
 0000003C  ---- Variable 'index' assigned to Register 'R0' ----
 0000003C  EA000009  B           L_7  ; Targ=0x68
   18:             do
 00000040          L_11:
 00000040          L_10:
   20:                 val         = AD0DR;            // Read A/D Data Register 
 00000040  E5101000  LDR         R1,=0xE0034004
 00000044  E5911000  LDR         R1,[R1,#0x0]
 00000048  ---- Variable 'val' assigned to Register 'R1' ----
   21:             }        
 00000048  E1A02001  MOV         R2,R1 ; val
 0000004C  E3120102  TST         R2,#0x80000000 ; val
 00000050  0AFFFFFA  BEQ         L_10  ; Targ=0x40
   24:             DACR            = val;
 00000054  E1A02001  MOV         R2,R1 ; val
 00000058  E5101000  LDR         R1,=0xE006C000
 0000005C  E5812000  STR         R2,[R1,#0x0]
   25:         }  
 00000060  E2800001  ADD         R0,R0,#0x0001 ; index
 00000064  E20000FF  AND         R0,R0,#0x00FF
 00000068          L_7:
 00000068  E1A01000  MOV         R1,R0 ; index
 0000006C  E1A01C01  MOV         R1,R1,LSL #24 ; index
 00000070  E1A01C21  MOV         R1,R1,LSR #24
 00000074  E3510050  CMP         R1,#0x0050
 00000078  BAFFFFF0  BLT         L_11  ; Targ=0x40
   26:     }
 0000007C  EAFFFFED  B           L_9  ; Targ=0x38
 00000080            ; SCOPE-END
   27: }
 00000080  E8BD0008  LDMIA       R13!,{R3}
 00000084  E12FFF13  BX          R3
ARM COMPILER V2.50a,  main                                                                 31/01/08  10:01:21  PAGE 3   

 00000088          ENDP ; 'main'



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =    ------
  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  1 WARNING(S),  0 ERROR(S)