twi.a51

twi sample programme for at89c5153

$INCLUDE   (reg_c51.INC)

TWI_data DATA 10H;
slave_adr DATA 11H;
rw BIT 20H;                         /* 0=write, 1=read */
b_TWI_busy BIT 21H;

org 000h
ljmp begin
org 43h
ljmp twi_it

;/**
; * FUNCTION_PURPOSE:this function setup TWI in master mode and sends data to slave.
; * FUNCTION_INPUTS:void
; * FUNCTION_OUTPUTS:void
; */
org 0100h

begin:

ORL SSCON,#40h;                     /* enable TWI */
SETB EA;                            /* interrupt enable */
ORL IEN1,#02h;                      /* enable TWI interrupt */

CLR b_TWI_busy
loop:                               /* end less */

JB b_TWI_busy,end_if
MOV ACC,SSCON
JB ACC.4,end_if
   SETB b_TWI_busy;                    /* flag busy =1 */
   MOV TWI_data,#55h;                  /* data example to send */
   MOV slave_adr,#01h;                 /* slave adresse example */
   CLR rw;                             /* 0=write */
   MOV SSDAT,#00h;                     /* clear buffer before sending data */
   ORL SSCON,#20h;                     /* TWI start sending */
end_if:

JMP loop

;/**
; * FUNCTION_PURPOSE:TWI interrupt, task witch process the different status of TWI
; * FUNCTION_INPUTS:void
; * FUNCTION_OUTPUTS:void
; */
twi_it:
MOV R7,SSCS

;/* TWI status tasking */
   
      CJNE R7,#00h,end_case_00;      /* A start condition has been sent */
                                    /* SLR+R/W are transmitted, ACK bit received */
      CLR b_TWI_busy;               /* TWI is free */
      JMP end_switch
      end_case_00:
      

      CJNE R7,#08h,end_case_08;      /* A start condition has been sent */
                                    /* SLR+R/W are transmitted, ACK bit received */
      ANL SSCON,#~20h;              /* clear start condition */
      /* send slave adress and read/write bit */
      MOV ACC,slave_adr
      RL A
      MOV C,rw
      MOV ACC.0,C
      MOV SSDAT,A

      ORL SSCON,#04h;               /* set AA */
      JMP end_switch
      end_case_08:


      CJNE R7,#10h,end_case_10;      /* A repeated start condition has been sent */
                                    /* SLR+R/W are transmitted, ACK bit received */
      ANL SSCON,#~20h;              /* clear start condition */
      /* send slave adress and read/write bit */
      MOV ACC,slave_adr
      RL  A
      MOV C,rw
      MOV ACC.0,C
      MOV SSDAT,A

      ORL SSCON,#04h;               /* set AA */
      JMP end_switch
      end_case_10:


      CJNE R7,#18h,end_case_18;      /* SLR+W was transmitted, ACK bit received */
      MOV SSDAT,TWI_data;           /* Transmit data byte, ACK bit received */
      ORL SSCON,#04h;               /* set AA */
      JMP end_switch
      end_case_18:

      CJNE R7,#20h,end_case_20;      /* SLR+W was transmitted, NOT ACK bit received */
      ORL SSCON,#10h;               /* Transmit STOP */
      CLR b_TWI_busy;               /* TWI is free */
      JMP end_switch
      end_case_20:

      CJNE R7,#28h,end_case_28;      /* DATA was transmitted, ACK bit received */
      ORL SSCON,#10h;               /* send STOP */
      CLR b_TWI_busy;               /* TWI is free */
      JMP end_switch
      end_case_28:

      CJNE R7,#30h,end_case_30;      /* DATA was transmitted, NOT ACK bit received */
      ORL SSCON,#10h;               /* Transmit STOP */
      CLR b_TWI_busy;               /* TWI is free */
      JMP end_switch
      end_case_30:

      CJNE R7,#38h,end_case_38;      /* Arbitration lost in SLA+W or DATA.  */
      ORL SSCON,#10h;               /* Transmit STOP */
      CLR b_TWI_busy;               /* TWI is free */
      JMP end_switch
      end_case_38:
   
end_switch:
ANL SSCON,#~08;                     /* clear flag */
RETI

end