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📄 t0_m3_t_gs.a51

📁 timer for AT89C5131 example
💻 A51
字号:
$INCLUDE   (reg_c51.INC)

org 000h
ljmp begin

org 00Bh
ljmp it_timer0

org 01Bh
ljmp it_timer1
;/**
; * FUNCTION_PURPOSE: This file set up timer 0 in mode 3 (Split Timer)
; * with a software gate.When timer 0 is placed in this mode, it essentially
; * becomes two separate 8-bits timers.
; * One consist of TL0 (8bits) and can be gated by software 
; * The other consist of TH0 (8bits),is always in timer mode and cannot be gated.
; * TR0 bit is used to run TL0 and TR1 bit is used to run TH0 and timer1 always running.
; * You can use this mode if you need to have two separate timers and,
; * additionally,a baud rate generator.In such case you can use the timer1 as baud
; * rate generator and use TH0/TL0 as two separate timers.
; * FUNCTION_INPUTS: void
; * FUNCTION_OUTPUTS: void
; */
org 0100h

begin:
	ANL TMOD,#0F0h;			      /* Timer 0 mode 3 with software gate */
	ORL TMOD,#03h;              /* GATE0=0; C/T0#=0; M10=1; M00=1; */
	
	MOV TH0,#00h;			         /* init values */
	MOV TL0,#00h;		
	SETB ET0;						   /* enable timer0 interrupt */
	SETB ET1;                     /* enable timer1 interrupt */
	SETB EA;                      /* enable interrupts */
	SETB TR0;			     	      /* run TL0 */
	SETB TR1;			     	      /* run TH0 */

	JMP $;						      /* endless  */


;/**
; * FUNCTION_PURPOSE: timer0 interrupt
; * FUNCTION_INPUTS: void
; * FUNCTION_OUTPUTS: P1.0 toggle period = 2 * 8192 cycles  
; */
it_timer0:

	CLR TF0;						/* reset  interrupt flag (already done by hardware)*/
	CPL P1.0;					/* P1.0 toggle when interrupt. */
   RETI


;/**
; * FUNCTION_PURPOSE: timer1 interrupt is set at TH0 overflow and not influenced by TH1
; * FUNCTION_INPUTS: void
; * FUNCTION_OUTPUTS: P1.1 toggle period = 2 * 8192 cycles  
; */
it_timer1:

	CLR TF1;						/* reset  interrupt flag (already done by hardware)*/
	CPL P1.1;					/* P1.1 toggle when interrupt. */
   RETI

end

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