📄 pic_hi-tech_c_eeprom_spi_to_93xxx.txt
字号:
The following code is used for interfacing the PIC16CXX and PIC17CXX SPI port to
93XXX EEPROMS.
The following routines are used on the PIC16C67 device with RC2 as the chip
select(CS) and the RC3,4 &5 pins used in SPI configuration(SCK,SDI and SDO):
/* ______________________________________________________________
***** SPI SET UP ROUTINE *****
BAUD =SYNCHRONOUS
8 BIT TRANSMISSION AND RECEPTION WITH 1 START AND 1 STOP BIT
______________________________________________________________ */
SSPSTAT = 0x00; // SMP=0, CKE=0 (Always)
SSPCON = 0x31; // CKP=1(Write), CKP=0(Read)
/* ______________________________________________________________ */
/* Before staring, the 93XXX device must be write enabled */
/* ____________________________________________________________
EWEN Routine for SPI bus (Write Enable)
____________________________________________________________ */
RC2 = 1; // Make sure CS is high
dummy = SPI_OUTPUT(0x02); // Start bit is bit1,
// 00 is opcode for EWEN
dummy = SPI_OUTPUT(0x60); // 0110 (6) required for
// EWEN 0's are don't cares
// for 5 lsb address bits
RC2 = 0; // Bring chip select line low to begin
// EEPROM internal write cycle
// MUST wait 5 ms for internal cycle to complete
/* ----------------------------------------------------------------------
/* __________________________________________________________
SPI Routines for EEPROM Communication
Note: The 93LC46A has a 5 mS write cycle !!!!!
See Microchip AN613 for details on interfacing 93 Series EEPROMs to the PIC
SPI bus. Usually, more than 8 bits are required to control a 93LCxx device, so
two bytes required. Note also the right justification of the bytes so that the
LSB of the address is the LSB of a byte to be output. ex.
First Byte
| 0 | 0 | 0 | 0 | 0 | 0 | SB | OP1 |
where SB is the start bit and OP1 is the op code msb.
Second Byte
| OP0 | A6 | A5 | A4 | A3 | A2 | A1 | AO |
where OP0 is op code lsb and A6-A0 are address bits necessary to address 128
bytes of memory.
__________________________________________________________ */
char SPI_OUTPUT ( char spi_byte )
{
SSPBUF = spi_byte;
do {
}
while(!STAT_BF);
return SSPBUF;
}
void WR_BYTE ( char EE_address, char EE_data )
{
RC2 = 1; // Set chip select high
dummy = SPI_OUTPUT ( 0x02 ); // start bit is bit 1,
// Note: 01 is op-code for write, since everything is right justified
// the 1 falls into the second byte in the leftmost position(bit 7).
// The EE_address must be ORed with b'1000 0000'.
EE_address |= 0x80;
dummy = SPI_OUTPUT ( EE_address ); // Address location
dummy = SPI_OUTPUT ( EE_data ); // Data
RC2 = 0; // Must set chip select low to start
// internal programming cycle.
}
char RD_BYTE ( char EE_address )
{
char spi_received = 0;
RC2 = 1; // Set chip select high
dummy = SPI_OUTPUT (0x03); // Start bit is bit 1
EE_address &= 0x7F; // bit 7 must be 0 - can
// only address 0 -128 (93LC46A)
dummy = SPI_OUTPUT (EE_address ); //
// *******************************************************
// This is where CKP is reset for receiving data.
// *******************************************************
CKP = 0; // change clock polarity to 0
spi_received = SPI_OUTPUT ( 0x00 ); // The byte
// transmitted here is a don't care.
RC2 = 0; // Bring chip select low to terminate
// the read command
CKP = 1; // Return clock polarity to 1
return spi_received;
}
When writing to the device : WR_BYTE ( Address, data) 8 bits max per adress
and data
When reading device: xxx = RD_BYTE ( Address ) Returns char @ address
specified, 8 bit address only
Again, this code is for the 93XX series of EEPROMS which may differ from your
device. I remember when I wrote the above that I initially had trouble because I
did not switch the clock polarity when receiving data. Hope this helps!
Brian Makulinski
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -