cdmaturbo.mdl

众所周知

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	  RTWCompilerOptimization "Off"
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		Cell			"IgnoreCustomStorageClasses"
		Cell			"InsertBlockDesc"
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		Cell			"SimulinkDataObjDesc"
		Cell			"DefineNamingRule"
		Cell			"SignalNamingRule"
		Cell			"ParamNamingRule"
		Cell			"InlinedPrmAccess"
		Cell			"CustomSymbolStr"
		Cell			"CustomSymbolStrGlobalVar"
		Cell			"CustomSymbolStrType"
		Cell			"CustomSymbolStrField"
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		Cell			"CustomSymbolStrBlkIO"
		Cell			"CustomSymbolStrTmpVar"
		Cell			"CustomSymbolStrMacro"
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	      Version		      "1.4.0"
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	      MaxIdLength	      31
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	      CustomSymbolStrType     "$N$R$M"
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	      CustomSymbolStrFcn      "$R$N$M$F"
	      CustomSymbolStrBlkIO    "rtb_$N$M"
	      CustomSymbolStrTmpVar   "$N$M"
	      CustomSymbolStrMacro    "$R$N$M"
	      DefineNamingRule	      "None"
	      ParamNamingRule	      "None"
	      SignalNamingRule	      "None"
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	    Simulink.GRTTargetCC {
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	      Array {
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		Cell			"IncludeMdlTerminateFcn"
		Cell			"CombineOutputUpdateFcns"
		Cell			"SuppressErrorStatus"
		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"GenerateTestInterfaces"
		Cell			"ModelStepFunctionPrototypeControlCompliant"
		Cell			"CPPClassGenCompliant"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		Cell			"PortableWordSizes"
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	      Version		      "1.4.0"
	      TargetFcnLib	      "ansi_tfl_table_tmw.mat"
	      TargetLibSuffix	      ""
	      TargetPreCompLibLocation ""
	      TargetFunctionLibrary   "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
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	      GenerateTestInterfaces  off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      CompOptLevelCompliant   on
	      IncludeMdlTerminateFcn  on
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	      SuppressErrorStatus     off
	      ERTFirstTimeCompliant   off
	      IncludeFileDelimiter    "Auto"
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	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
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	      SupportNonFinite	      on
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	      SupportNonInlinedSFcns  on
	      EnableShiftOperators    on
	      ParenthesesLevel	      "Nominal"
	      PortableWordSizes	      off
	      ModelStepFunctionPrototypeControlCompliant off
	      AutosarCompliant	      off
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      ExtModeIntrfLevel	      "Level1"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
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	PropName		"Components"
      }
      Name		      "Configuration"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
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  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
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  BlockParameterDefaults {
    Block {
      BlockType		      Inport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      OutMin		      "[]"
      OutMax		      "[]"
      DataType		      "auto"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: auto"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
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    Block {
      BlockType		      Mux
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      DisplayOption	      "none"
      UseBusObject	      off
      BusObject		      "BusObject"
      NonVirtualBus	      off
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    Block {
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      BusObject		      "BusObject"
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      OutMin		      "[]"
      OutMax		      "[]"
      DataType		      "auto"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: auto"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
      SFunctionDeploymentMode off
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      "FromPortIcon"
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      CheckFcnCallInpInsideContextMsg off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      ToWorkspace
      VariableName	      "simulink_output"
      MaxDataPoints	      "1000"
      Decimation	      "1"
      SampleTime	      "0"
      FixptAsFi		      off
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    Block {
      BlockType		      FrameConversion
      InheritSamplingMode     off
      OutFrame		      "Frame-based"
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    Block {
      BlockType		      Reshape
      OutputDimensionality    "1-D array"
      OutputDimensions	      "[1,1]"
    }
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      SamplingMode	      "Sample based"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "fixdt(1,16,0)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Inherit from 'Constant value'"
      SampleTime	      "inf"
      FramePeriod	      "inf"
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimization)"
      LogicDataType	      "uint(8)"
      OutDataTypeStr	      "Inherit: Logical (see Configuration Parameters: Optimization)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    UseDisplayTextAsClickCallback off
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  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "cdmaturbo"
    Location		    [361, 301, 1245, 601]
    Open		    on
    ModelBrowserVisibility  on
    ModelBrowserWidth	    212
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
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    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "Bernoulli Binary\nGenerator"
      Ports		      [0, 1]
      Position		      [30, 58, 110, 102]
      DialogController	      "commDDGCreate"
      DialogControllerArgs    "DataTag0"
      FontName		      "Arial"
      SourceBlock	      "commrandsrc2/Bernoulli Binary\nGenerator"
      SourceType	      "Bernoulli Binary Generator"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      P			      "0.5"
      seed		      "61"
      Ts		      "1/378"
      frameBased	      on
      sampPerFrame	      "378"
      orient		      off
      outDataType	      "double"
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    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace"
      Position		      [415, 65, 475, 95]
      VariableName	      "Signal"
      MaxDataPoints	      "inf"
      SampleTime	      "-1"
      SaveFormat	      "Array"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Turbo Encoder"
      Ports		      [1, 1]
      Position		      [205, 59, 305, 101]
      TreatAsAtomicUnit	      on
      MinAlgLoopOccurrences   off
      PropExecContextOutsideSubsystem off