⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 password .asm

📁 密码锁 1. 出厂的统一密码为个人码″12345678″
💻 ASM
📖 第 1 页 / 共 2 页
字号:
		sz		acc
		jmp		main_proc	

		mov		a,07fh
		mov		release_num,a
		mov		a, 8
		mov		temp_num, a
		mov		a,010h
		mov		word_address, a
		mov		a, offset array_data
		mov		mp0, a
manage_0:	
		mov		a,r0
		mov 	write_in,a
		call		ht24_write
		inc		mp0
		inc		word_address
		sdz		temp_num
		jmp		manage_0
		clr		flg_chang_key
		clr		flg_chang
		clr		flg_chang_manage
		call		chang_end
		mov		a, offset array_data
		mov		mp0, a
		jmp		main_proc
;---------------------------------------------
release_proc:			
		snz 	fg_repeat
		jmp		release_1
		call		delay30ms
		inc		delay0   
		mov		a,13
		xor		a,delay0 
		sz		acc				
		jmp		main_proc
		jmp		release_end

release_1:								;;which key will be cleared
		snz		release_num.0			
		mov		a, offset array_data
		snz		release_num.1
		mov		a, offset array_data+1
		snz		release_num.2
		mov		a, offset array_data+2
		snz		release_num.3
		mov		a, offset array_data+3
		snz		release_num.4
		mov		a, offset array_data+4
		snz		release_num.5
		mov		a, offset array_data+5
		snz		release_num.6
		mov		a, offset array_data+6
		snz		release_num.7
		mov		a, offset array_data+7

		mov		mp0, a		
		clr		r0						;;if pressed 2s,clear all 
		clr		release_flg
		rr		release_num
		jmp		main_proc
;*****************Write***********************
ht24_write:
	set		sda
d_1
	set		scl
	d_1		
	clr		sda				;start signal
           		
	clr		scl
	set		sda				;1
	d_1		
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0
	set		scl
	d_1		
           		
	clr		scl
	set		sda				;1
	d_1		
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0
	set		scl
	d_1		

	clr		scl
	clr		sda				;a2,a1,a0=0
	set		scl
	d_1		
           		
	clr		scl
	set		scl
	d_1		
           		
	clr		scl
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0 write mode
	set		scl
	d_1		
           		
	clr		scl
	set		sda				;1 for ack,set input,accept the answering signal
	d_1		
	set		scl				;read_modify_write
	d_1		
	   		
skch:      		
	sz 		sda				;respond signal
	jmp		skch
	clr		scl
	mov		a,08h	
	mov		data_8,a			;8 bit
write_address_in:
	clr		sda
	sz		word_address.7
	set		sda
	d_1		
	set		scl
	d_1		
           		
	clr         	scl
	rl           	word_address
	sdz        	data_8
	jmp       	write_address_in
	set         	sda
	d_1
	set         	scl
	d_1

wdow:
	sz		sda
	jmp		wdow
	clr		scl
	mov		a,08h
	mov		data_8,a
write_data_in:
	clr		sda
	sz		write_in.7
	set		sda
	d_1		
	set		scl
	d_1		
           		
	clr		scl
	rl		write_in
	sdz		data_8
	jmp		write_data_in
           		
	clr		sda
	set		scl
	d_1		
	clr		scl
	set		scl
	d_1		
	set		sda				;stop signal
	d_1		
	clr		scl
	ret

;******************** Read************************
ht24_read:
	set		sda
	d_1		
	set		scl
	d_1		
	clr		sda				;start signal
           		
	clr		scl
	set		sda				;1
	d_1		
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0
	set		scl
	d_1		
           		
	clr		scl
	set		sda				;1
	d_1		
           		
	set		scl
	d_1

	clr		scl
	clr		sda				;0
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;a2,a1,a0=0,0,0
	set		scl
	d_1		

	clr		scl
	set		scl
	d_1		
           		
	clr		scl
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0 write mode
	set		scl
	d_1		
           		
	clr		scl
	set		sda		 		;for ack
	d_1		
	set		scl
	d_1		
flel:      		
	sz		sda
	jmp		ht24_read
	clr		scl
	mov		a,08h
	mov		data_8,a
read_address_in:
	clr		sda
	sz		word_address.7
	set		sda
	d_1		
	set		scl
	d_1		
	clr		scl
	rl		word_address
	sdz		data_8
	jmp		read_address_in
           		
	set		sda				;for ack
	d_1		
	set		scl
	d_1		
           		
skco:
	sz		sda
	jmp		skco
	clr		scl
restart:
	set		sda
	d_1		
	set		scl
	d_1		
	clr		sda				;start signal
           		
	clr		scl
	set		sda				;1
	d_1		
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0
	set		scl
	d_1		
           		
	clr		scl
	set		sda				;1
	d_1		
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;0
	set		scl
	d_1		
           		
	clr		scl
	clr		sda				;a2,a1,a0=0
	set		scl
	d_1

	clr		scl
	set		scl
	d_1		
           		
	clr		scl
	set		scl
	d_1		
           		
	clr		scl
	set		sda				;1 read mode 
	d_1		
	set		scl
	d_1		
														
	clr		scl
	set		sda				;for ack
	d_1
	set		scl
	d_1
ewfp:
	sz		sda
	jmp		ewfp
	mov		a,08h
	mov		data_8,a
flow_out:  		
	clr		scl
	set		sda				;input I/O
	d_1		
	clr		read_out.7
	sz		sda
	set		read_out.7
	d_1		
	set		scl
	d_1		
	rl		read_out
	sdz		data_8
	jmp		flow_out
           		
	clr		scl
	clr		sda
	set		scl
	d_1		
	set		sda						;stop signal
	d_1		
	ret
;***********************Deal with LED******************************
           		
fail_out:  							;deal with fail 
		set		pa.2
		call	delay_200ms
		call	delay_200ms
		call	delay_200ms
		call	delay_200ms
		call	delay_200ms
clr_array_data:						;;clrea 8 bytes password
		mov		a,8
		mov		temp_num,a
		mov		a, offset array_data
		mov		mp0, a	
out:	
		clr		r0
		inc		mp0
		sdz		temp_num
		jmp     out
		mov		a,04h
		xorm	a,pa
		clr		delay0
		mov		a, offset array_data
		mov		mp0, a
		jmp		main_proc	
;;-------------------------
release_end:						;;After the green LED bright,the red LED bright
		mov		a,02h
		xorm	a,pa	
		call	delay_200ms	
		call	delay_200ms
		mov		a,06h	
		xorm	a,pa	
		call	delay_200ms	
		call	delay_200ms
		clr		delay0
		jmp		clr_array_data
;--------------------------
chang_proc:
		mov		a,02h
		xorm	a,pa

		clr		delay
		mov		a, 030h					;
		mov		delay1, a
	$3:	
		sdz		delay
		jmp		$3
	
		sdz		delay1
		jmp		$3
		clr		delay1
		clr		delay

		inc		delay0
		mov		a,04h
		xorm	a,pa

		clr		delay
		mov		a, 030h					;
		mov		delay1, a
	$4:	
		sdz		delay
		jmp		$4
	
		sdz		delay1
		jmp		$4
		clr		delay1
		clr		delay

		mov		a,3
		xor		a,delay0
		sz		acc	
		jmp		chang_proc	
		mov		a,0
		xorm	a,pa
		clr		delay0
		ret

chang_end:
		mov		a,06h
		xorm	a,pa
		clr			delay
		mov			a, 196h			;
		mov			delay1, a
	$5:	
		sdz			delay
		jmp			$5
	
		sdz			delay1
		jmp			$5
		mov		a,06h
		xorm	a,pa
		ret		
;======================			
ok_end:  
		clr		delay0
		mov		a,082h
		xorm	a,pa		  		
		call	delay_200ms
		mov		a,25
		inc		delay0
		xor		a,delay0
		sz		acc					;Password is right,open the door
		jmp		$-5
		mov		a,080h
		xorm	a,pa				                 ;PA.7 is low,open the magnet
		clr		delay0
		mov		a, offset array_data
		mov		mp0, a
		jmp		main_proc
;=========================
low_voltage:
		set		pa.2
		jmp 	$				                 ;;If low_voltage,No aciton

;*******************delay program************************
delay_200ms:		
		clr			delay
		mov			a, 196h			
		mov			delay1, a
	$0:	
		sdz			delay
		jmp			$0
	
		sdz			delay1
		jmp			$0
		ret
;-----------------------
delay30ms:
		clr		delay
		mov		a, 030h				
		mov		delay1, a
	$1:	
		sdz		delay
		jmp		$1
	
		sdz		delay1
		jmp		$1
		clr		delay1
		clr		delay
		ret
;*************************************************
;*************************************************
		
	ORG  	03e0h
manage_clock:
		DC		8
		DC		8
		DC		8
		DC		8
		DC		8
		DC		8
		DC		8
		DC		8

	ORG  	03f0h
personal_clock:
		DC		1
		DC		2
		DC		3
		DC		4
		DC		5
		DC		6
		DC		7
		DC		8

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -