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📄 lamp.fnsim.qmsg

📁 交通灯。1)当乡村公路无车时
💻 QMSG
📖 第 1 页 / 共 2 页
字号:
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Sep 08 12:36:00 2008 " "Info: Processing started: Mon Sep 08 12:36:00 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off lamp -c lamp --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off lamp -c lamp --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "contr.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file contr.v" { { "Info" "ISGN_ENTITY_NAME" "1 contr " "Info: Found entity 1: contr" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cnt10de.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file cnt10de.v" { { "Info" "ISGN_ENTITY_NAME" "1 cnt10de " "Info: Found entity 1: cnt10de" {  } { { "cnt10de.v" "" { Text "D:/games/testlamp/cnt10de.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "top1.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file top1.v" { { "Info" "ISGN_ENTITY_NAME" "1 top1 " "Info: Found entity 1: top1" {  } { { "top1.v" "" { Text "D:/games/testlamp/top1.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Block1.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file Block1.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 Block1 " "Info: Found entity 1: Block1" {  } { { "Block1.bdf" "" { Schematic "D:/games/testlamp/Block1.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "Block1 " "Info: Elaborating entity \"Block1\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "top1 top1:inst " "Info: Elaborating entity \"top1\" for hierarchy \"top1:inst\"" {  } { { "Block1.bdf" "inst" { Schematic "D:/games/testlamp/Block1.bdf" { { 88 424 536 248 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "top.v 1 1 " "Warning: Using design file top.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 top " "Info: Found entity 1: top" {  } { { "top.v" "" { Text "D:/games/testlamp/top.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "top top1:inst\|top:v0 " "Info: Elaborating entity \"top\" for hierarchy \"top1:inst\|top:v0\"" {  } { { "top1.v" "v0" { Text "D:/games/testlamp/top1.v" 6 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "contr top1:inst\|top:v0\|contr:u0 " "Info: Elaborating entity \"contr\" for hierarchy \"top1:inst\|top:v0\|contr:u0\"" {  } { { "top.v" "u0" { Text "D:/games/testlamp/top.v" 7 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VRFC_OBJECT_ASSIGNED_NOT_READ" "m contr.v(10) " "Warning (10036): Verilog HDL or VHDL warning at contr.v(10): object \"m\" assigned a value but never read" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 10 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 contr.v(25) " "Warning (10230): Verilog HDL assignment warning at contr.v(25): truncated value with size 32 to match size of target (2)" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 25 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 contr.v(31) " "Warning (10230): Verilog HDL assignment warning at contr.v(31): truncated value with size 32 to match size of target (2)" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 31 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_ALWAYS_ID_HOLDS_VALUE" "light contr.v(17) " "Warning (10240): Verilog HDL Always Construct warning at contr.v(17): inferring latch(es) for variable \"light\", which holds its previous value in one or more paths through the always construct" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 17 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "light\[5\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"light\[5\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "light\[4\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"light\[4\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "light\[3\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"light\[3\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "light\[2\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"light\[2\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "light\[1\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"light\[1\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "light\[0\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"light\[0\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_ALWAYS_ID_HOLDS_VALUE" "numm contr.v(17) " "Warning (10240): Verilog HDL Always Construct warning at contr.v(17): inferring latch(es) for variable \"numm\", which holds its previous value in one or more paths through the always construct" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 17 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[7\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[7\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[6\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[6\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[5\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[5\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[4\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[4\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[3\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[3\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[2\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[2\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[1\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[1\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numm\[0\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numm\[0\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_ALWAYS_ID_HOLDS_VALUE" "numc contr.v(17) " "Warning (10240): Verilog HDL Always Construct warning at contr.v(17): inferring latch(es) for variable \"numc\", which holds its previous value in one or more paths through the always construct" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 17 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "numc\[7\] contr.v(21) " "Info (10041): Verilog HDL or VHDL info at contr.v(21): inferred latch for \"numc\[7\]\"" {  } { { "contr.v" "" { Text "D:/games/testlamp/contr.v" 21 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}

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