📄 lamp.tan.rpt
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; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Default hold multicycle ; Same As Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk_in ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk_in' ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------+------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------+------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 47.89 MHz ( period = 20.882 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 5.223 ns ;
; N/A ; 47.89 MHz ( period = 20.882 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 5.223 ns ;
; N/A ; 48.42 MHz ( period = 20.652 ns ) ; top1:inst|top:v0|cnt10de:u4|q[3] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 5.108 ns ;
; N/A ; 48.42 MHz ( period = 20.652 ns ) ; top1:inst|top:v0|cnt10de:u4|q[3] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 5.108 ns ;
; N/A ; 49.13 MHz ( period = 20.354 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|light[1] ; clk_in ; clk_in ; None ; None ; 4.959 ns ;
; N/A ; 49.32 MHz ( period = 20.274 ns ) ; top1:inst|top:v0|cnt10de:u4|q[0] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 4.919 ns ;
; N/A ; 49.32 MHz ( period = 20.274 ns ) ; top1:inst|top:v0|cnt10de:u4|q[0] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 4.919 ns ;
; N/A ; 49.69 MHz ( period = 20.124 ns ) ; top1:inst|top:v0|cnt10de:u4|q[3] ; top1:inst|top:v0|contr:u0|light[1] ; clk_in ; clk_in ; None ; None ; 4.844 ns ;
; N/A ; 49.78 MHz ( period = 20.090 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|light[3] ; clk_in ; clk_in ; None ; None ; 4.827 ns ;
; N/A ; 49.87 MHz ( period = 20.054 ns ) ; top1:inst|top:v0|cnt10de:u2|q[1] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 4.801 ns ;
; N/A ; 49.87 MHz ( period = 20.054 ns ) ; top1:inst|top:v0|cnt10de:u2|q[1] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 4.801 ns ;
; N/A ; 49.94 MHz ( period = 20.026 ns ) ; top1:inst|top:v0|cnt10de:u2|q[2] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 4.787 ns ;
; N/A ; 49.94 MHz ( period = 20.026 ns ) ; top1:inst|top:v0|cnt10de:u2|q[2] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 4.787 ns ;
; N/A ; 50.22 MHz ( period = 19.914 ns ) ; top1:inst|top:v0|cnt10de:u4|q[2] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 4.739 ns ;
; N/A ; 50.22 MHz ( period = 19.914 ns ) ; top1:inst|top:v0|cnt10de:u4|q[2] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 4.739 ns ;
; N/A ; 50.35 MHz ( period = 19.860 ns ) ; top1:inst|top:v0|cnt10de:u4|q[3] ; top1:inst|top:v0|contr:u0|light[3] ; clk_in ; clk_in ; None ; None ; 4.712 ns ;
; N/A ; 50.64 MHz ( period = 19.746 ns ) ; top1:inst|top:v0|cnt10de:u4|q[0] ; top1:inst|top:v0|contr:u0|light[1] ; clk_in ; clk_in ; None ; None ; 4.655 ns ;
; N/A ; 50.68 MHz ( period = 19.730 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|light[4] ; clk_in ; clk_in ; None ; None ; 4.653 ns ;
; N/A ; 50.73 MHz ( period = 19.712 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|numc[4] ; clk_in ; clk_in ; None ; None ; 4.638 ns ;
; N/A ; 51.05 MHz ( period = 19.588 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|numm[0] ; clk_in ; clk_in ; None ; None ; 4.576 ns ;
; N/A ; 51.06 MHz ( period = 19.586 ns ) ; top1:inst|top:v0|cnt10de:u2|q[3] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 4.567 ns ;
; N/A ; 51.06 MHz ( period = 19.586 ns ) ; top1:inst|top:v0|cnt10de:u2|q[3] ; top1:inst|top:v0|contr:u0|light[0] ; clk_in ; clk_in ; None ; None ; 4.567 ns ;
; N/A ; 51.21 MHz ( period = 19.526 ns ) ; top1:inst|top:v0|cnt10de:u2|q[1] ; top1:inst|top:v0|contr:u0|light[1] ; clk_in ; clk_in ; None ; None ; 4.537 ns ;
; N/A ; 51.23 MHz ( period = 19.518 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|numm[2] ; clk_in ; clk_in ; None ; None ; 4.547 ns ;
; N/A ; 51.23 MHz ( period = 19.518 ns ) ; top1:inst|top:v0|cnt10de:u4|q[1] ; top1:inst|top:v0|contr:u0|numm[5] ; clk_in ; clk_in ; None ; None ; 4.547 ns ;
; N/A ; 51.28 MHz ( period = 19.500 ns ) ; top1:inst|top:v0|cnt10de:u4|q[3] ; top1:inst|top:v0|contr:u0|light[4] ; clk_in ; clk_in ; None ; None ; 4.538 ns ;
; N/A ; 51.29 MHz ( period = 19.498 ns ) ; top1:inst|top:v0|cnt10de:u2|q[2] ; top1:inst|top:v0|contr:u0|light[1] ; clk_in ; clk_in ; None ; None ; 4.523 ns ;
; N/A ; 51.33 MHz ( period = 19.482 ns ) ; top1:inst|top:v0|cnt10de:u4|q[3] ; top1:inst|top:v0|contr:u0|numc[4] ; clk_in ; clk_in ; None ; None ; 4.523 ns ;
; N/A ; 51.33 MHz ( period = 19.482 ns ) ; top1:inst|top:v0|cnt10de:u4|q[0] ; top1:inst|top:v0|contr:u0|light[3] ; clk_in ; clk_in ; None ; None ; 4.523 ns ;
; N/A ; 51.35 MHz ( period = 19.476 ns ) ; top1:inst|top:v0|cnt10de:u2|q[0] ; top1:inst|top:v0|contr:u0|light[5] ; clk_in ; clk_in ; None ; None ; 4.512 ns ;
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