spce3200_constant.h

GPRS模组资料包含DEMO

#define C_NAND_RXBUF_FULL         0x00000002    // P_NAND_INT_CTRL, P_NAND_INT_STATUS
#define C_NAND_RDY_INT            0x00000004    // P_NAND_INT_CTRL, P_NAND_INT_STATUS
#define C_NAND_TX_MISS            0x00000008    // P_NAND_INT_CTRL, P_NAND_INT_STATUS
#define C_NAND_RX_MISS            0x00000010    // P_NAND_INT_CTRL, P_NAND_INT_STATUS
#define C_NAND_CMD_MISS           0x00000020    // P_NAND_INT_CTRL, P_NAND_INT_STATUS
#define C_NAND_CTRL_BUSY          0x00000040    // P_NAND_INT_STATUS
#define C_NAND_FLASH_RDY          0x00000080    // P_NAND_INT_STATUS

#define C_NAND_ECC_START          0x00000001    // P_NAND_ECC_CTRL
#define C_NAND_ECC0_RST           0x00000002    // P_NAND_ECC_CTRL
#define C_NAND_ECC1_RST           0x00000004    // P_NAND_ECC_CTRL

#define C_NAND_ECC0_NOERR         0x00000000    // P_NAND_ECC_STATUS
#define C_NAND_ECC0_1ERR          0x00004000    // P_NAND_ECC_STATUS
#define C_NAND_ECC0_2ERR          0x0000C000    // P_NAND_ECC_STATUS
#define C_NAND_ECC1_NOERR         0x00000000    // P_NAND_ECC_STATUS
#define C_NAND_ECC1_1ERR          0x40000000    // P_NAND_ECC_STATUS
#define C_NAND_ECC1_2ERR          0xC0000000    // P_NAND_ECC_STATUS

//******************************************************************//
//                              SD-Card                             //
//******************************************************************//

#define C_SD_PORT_SEL             0x00010000    // P_SD_INTERFACE_SEL

#define C_SD_CLK_EN               0x00000001    // P_SD_CLK_CONF
#define C_SD_RST_DIS              0x00000002    // P_SD_CLK_CONF

#define C_SD_BUS_1BIT             0x00000000    // P_SD_MODE_CTRL
#define C_SD_BUS_4BIT             0x00000100    // P_SD_MODE_CTRL
#define C_SD_DMA_EN               0x00000200    // P_SD_MODE_CTRL
#define C_SD_IOINT_DETECT         0x00000400    // P_SD_MODE_CTRL
#define C_SD_PORT_EN              0x00000800    // P_SD_MODE_CTRL

#define C_SD_CMDCOMPLETE_INTEN    0x00000001    // P_SD_INT_CTRL
#define C_SD_DATACOMPLETE_INTEN   0x00000002    // P_SD_INT_CTRL
#define C_SD_CMDBUFFULL_INTEN     0x00000004    // P_SD_INT_CTRL
#define C_SD_DATABUFFULL_INTEN    0x00000008    // P_SD_INT_CTRL
#define C_SD_DATABUFEMPTY_INTEN   0x00000010    // P_SD_INT_CTRL
#define C_SD_CARDDETECT_INTEN     0x00000020    // P_SD_INT_CTRL
#define C_SD_IO_INTEN             0x00000040    // P_SD_INT_CTRL

#define C_SD_CTRL_BUSY            0x00000001    // P_SD_INT_STATUS
#define C_SD_CARD_BUSY            0x00000002    // P_SD_INT_STATUS
#define C_SD_CMD_COMPLETE         0x00000004    // P_SD_INT_STATUS
#define C_SD_DATA_COMPLETE        0x00000008    // P_SD_INT_STATUS
#define C_SD_RSPINDEX_ERR         0x00000010    // P_SD_INT_STATUS
#define C_SD_RSPCRC_ERR           0x00000020    // P_SD_INT_STATUS
#define C_SD_CMDBUF_FULL          0x00000040    // P_SD_INT_STATUS
#define C_SD_DATABUF_FULL         0x00000080    // P_SD_INT_STATUS
#define C_SD_DATABUF_EMPTY        0x00000100    // P_SD_INT_STATUS
#define C_SD_TIME_OUT             0x00000200    // P_SD_INT_STATUS
#define C_SD_DATACRC_ERR          0x00000400    // P_SD_INT_STATUS
#define C_SD_CARD_PRESENT         0x00001000    // P_SD_INT_STATUS
#define C_SD_IO_INT               0x00002000    // P_SD_INT_STATUS

#define C_SD_CTRL_IDLE            0x00000040    // P_SD_COMMAND_SETUP
#define C_SD_CMD_START            0x00000080    // P_SD_COMMAND_SETUP
#define C_SD_CMD_WITHOUTDATA      0x00000000    // P_SD_COMMAND_SETUP
#define C_SD_CMD_WITHDATA         0x00000100    // P_SD_COMMAND_SETUP
#define C_SD_DATA_RECEIVE         0x00000000    // P_SD_COMMAND_SETUP
#define C_SD_DATA_TRANFER         0x00000200    // P_SD_COMMAND_SETUP
#define C_SD_SIGLE_BLOCK          0x00000000    // P_SD_COMMAND_SETUP
#define C_SD_MULTI_BLOCK          0x00000400    // P_SD_COMMAND_SETUP
#define C_SD_74CLK_START          0x00000800    // P_SD_COMMAND_SETUP
#define C_SD_RSP_R0               0x00000000    // P_SD_COMMAND_SETUP
#define C_SD_RSP_R1               0x00001000    // P_SD_COMMAND_SETUP
#define C_SD_RSP_R2               0x00002000    // P_SD_COMMAND_SETUP
#define C_SD_RSP_R3               0x00003000    // P_SD_COMMAND_SETUP
#define C_SD_RSP_R6               0x00006000    // P_SD_COMMAND_SETUP
#define C_SD_RSP_R1B              0x00007000    // P_SD_COMMAND_SETUP

//******************************************************************//
//                               LCD                                //
//******************************************************************//

#define C_LCD_PORT_AUO            0x00000001    // P_LCD_INTERFACE_SEL
#define C_LCD_PORT_TOPPOLY        0x00000002    // P_LCD_INTERFACE_SEL
#define C_LCD_PORT_STN            0x00000003    // P_LCD_INTERFACE_SEL

#define C_LCD_BUF0_SEL            0x00000000    // P_LCD_BUFFER_SEL
#define C_LCD_BUF1_SEL            0x00000001    // P_LCD_BUFFER_SEL
#define C_LCD_BUF2_SEL            0x00000002    // P_LCD_BUFFER_SEL

#define C_LCD_RST_DIS             0x00000002    // P_LCD_CLK_CONF
#define C_LCD_CLK_EN              0x00000001    // P_LCD_CLK_CONF

#define C_TFT_CLK_27M             0x00000000    // P_LCD_CLK_SEL
#define C_TFT_CLK_PLLUDIV2        0x00000008    // P_LCD_CLK_SEL
#define C_TFT_CLK_PLLUDIV3        0x00000010    // P_LCD_CLK_SEL
#define C_TFT_CLK_PLLUDIV4        0x00000018    // P_LCD_CLK_SEL
#define C_TFT_CLK_PLLUDIV6        0x00000020    // P_LCD_CLK_SEL
#define C_TFT_CLK_PLLUDIV8        0x00000028    // P_LCD_CLK_SEL

#define C_TFT_CTRL_EN             0x01000000    // P_TFT_MODE_CTRL
#define C_TFT_VER_DOUBLE          0x00000400    // P_TFT_MODE_CTRL
#define C_TFT_VER_HALF            0x00000800    // P_TFT_MODE_CTRL
#define C_TFT_HOR_DOUBLE          0x00000100    // P_TFT_MODE_CTRL
#define C_TFT_HOR_HALF            0x00000200    // P_TFT_MODE_CTRL
#define C_TFT_CLK_27MDIV1         0x00000000    // P_TFT_MODE_CTRL
#define C_TFT_CLK_27MDIV2         0x00000001    // P_TFT_MODE_CTRL
#define C_TFT_CLK_27MDIV4         0x00000002    // P_TFT_MODE_CTRL
#define C_TFT_CLK_27MDIV8         0x00000003    // P_TFT_MODE_CTRL

#define C_TFT_CCIR656_640         0x00000000    // P_TFT_DATA_FMT
#define C_TFT_CCIR656_720         0x00000100    // P_TFT_DATA_FMT
#define C_TFT_PARALLEL_RGB        0x00000000    // P_TFT_DATA_FMT
#define C_TFT_SERIAL_RGB          0x00000001    // P_TFT_DATA_FMT
#define C_TFT_SERIAL_RGBDM        0x00000002    // P_TFT_DATA_FMT
#define C_TFT_OUTPUT_CCIR601      0x00000003    // P_TFT_DATA_FMT
#define C_TFT_OUTPUT_CCIR656      0x00000004    // P_TFT_DATA_FMT

#define C_TFT_HOR_NEGATIVE        0x00000000    // P_TFT_HOR_SYNC
#define C_TFT_HOR_POSITIVE        0x01000000    // P_TFT_HOR_SYNC

#define C_TFT_VER_NEGATIVE        0x00000000    // P_TFT_VER_SYNC
#define C_TFT_VER_POSITIVE        0x01000000    // P_TFT_VER_SYNC

#define C_TFT_BUF_RGB565          0x00000000    // P_TFT_FRAME_FMT1
#define C_TFT_BUF_RGB1555         0x00000001    // P_TFT_FRAME_FMT1
#define C_TFT_BUF_YUYV            0x00000002    // P_TFT_FRAME_FMT1
#define C_TFT_BUF_4Y4U4Y4V        0x00000003    // P_TFT_FRAME_FMT1

#define C_TFT_BUFFER_ERR          0x01000000    // P_TFT_STATUS_SEL
#define C_TFT_FINISH_FLAG         0x00010000    // P_TFT_STATUS_SEL

#define C_TFT_OUTPUT_YCBCR        0x00000000    // P_TFT_DATA_SEQ
#define C_TFT_OUTPUT_YUV          0x01000000    // P_TFT_DATA_SEQ
#define C_TFT_SEQ_Y0U0Y1V0        0x00000000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_Y0V0Y1U0        0x00010000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_U0Y0V0Y1        0x00020000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_V0Y0U0Y1        0x00030000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_Y1U0Y0V0        0x00040000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_Y1V0Y0U0        0x00050000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_U0Y1V0Y0        0x00060000    // P_TFT_DATA_SEQ    for CCIR601
#define C_TFT_SEQ_V0Y1U0Y0        0x00070000    // P_TFT_DATA_SEQ    for CCIR601

#define C_TFT_SEQ_Y0CB0Y1CR0      0x00000000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_Y0CR0Y1CB0      0x00010000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_CB0Y0CR0Y1      0x00020000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_CR0Y0CB0Y1      0x00030000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_Y1CB0Y0CR0      0x00040000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_Y1CR0Y0CB0      0x00050000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_CB0Y1CR0Y0      0x00060000    // P_TFT_DATA_SEQ    for CCIR656
#define C_TFT_SEQ_CR0Y1CB0Y0      0x00070000    // P_TFT_DATA_SEQ    for CCIR656

#define C_TFT_ODD_RGB             0x00000000    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm odd line
#define C_TFT_ODD_GBR             0x00000100    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm odd line
#define C_TFT_ODD_BRG             0x00000200    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm odd line
#define C_TFT_ODD_RBG             0x00000300    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm odd line
#define C_TFT_ODD_BGR             0x00000400    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm odd line
#define C_TFT_ODD_GRB             0x00000500    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm odd line

#define C_TFT_EVEN_RGB            0x00000000    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm even line
#define C_TFT_EVEN_GBR            0x00000001    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm even line
#define C_TFT_EVEN_BRG            0x00000002    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm even line
#define C_TFT_EVEN_RBG            0x00000003    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm even line
#define C_TFT_EVEN_BGR            0x00000004    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm even line
#define C_TFT_EVEN_GRB            0x00000005    // P_TFT_DATA_SEQ    for serial RGB and serial RGBDm even line

#define C_TFT_INT_EN              0x01000000    // P_TFT_INT_STATUS
#define C_TFT_INT_FLAG            0x00010000    // P_TFT_INT_STATUS

#define C_TFT_BUF_YUV             0x00000000    // P_TFT_FRAME_FMT2
#define C_TFT_BUF_YCBCR           0x00000001    // P_TFT-FRAME_FMT2

//******************************************************************//
//                               TV                                 //
//******************************************************************//

#define C_TV_CLK_EN               0x00000001    // P_TV_CLK_CONF
#define C_TV_RST_DIS              0x00000002    // P_TV_CLK_CONF

#define C_TV_VBLANKINGSINT_EN     0x00000001    // P_TV_INT_CTRL
#define C_TV_VBLANKINGEINT_EN     0x00000002    // P_TV_INT_CTRL
#define C_TV_HVHITINT_EN          0x00000004    // P_TV_INT_CTRL
#define C_TV_LIGHTGUN0INT_EN      0x00000008    // P_TV_INT_CTRL
#define C_TV_LIGHTGUN1INT_EN      0x00000010    // P_TV_INT_CTRL

#define C_TV_VIDEODAC_EN          0x00000000    // P_TV_VIDEODAC_CTRL

#define C_TV_CTRL_EN              0x00001000    // P_TV_MODE_CTRL
#define C_TV_YCBCR422_MODE        0x00000000    // P_TV_MODE_CTRL
#define C_TV_4Y4U4Y4V_MODE        0x00000800    // P_TV_MODE_CTRL
#define C_TV_RGB565_MODE          0x00000000    // P_TV_MODE_CTRL
#define C_TV_ARGB1555_MODE        0x00000400    // P_TV_MODE_CTRL
#define C_TV_LITTLE_ENDIAN        0x00000000    // P_TV_MODE_CTRL
#define C_TV_BIG_ENDIAN           0x00000200    // P_TV_MODE_CTRL
#define C_TV_YCBCR_MODE           0x00000000    // P_TV_MODE_CTRL
#define C_TV_RGB_MODE             0x00000100    // P_TV_MODE_CTRL
#define C_TV_NTSC_TYPE            0x00000000    // P_TV_MODE_CTRL
#define C_TV_NTSCJ_TYPE           0x00000040    // P_TV_MODE_CTRL
#define C_TV_NTSC443_TYPE         0x00000080    // P_TV_MODE_CTRL
#define C_TV_NTSCX_TYPE           0x000000C0    // P_TV_MODE_CTRL
#define C_TV_QVGA_MODE            0x00000000    // P_TV_MODE_CTRL
#define C_TV_VGA_MODE             0x00000004    // P_TV_MODE_CTRL
#define C_TV_HVGA_MODE            0x00000008    // P_TV_MODE_CTRL
#define C_TV_QVGAX_MODE           0x0000000C    // P_TV_MODE_CTRL
#define C_TV_NTSC_MODE            0x00000000    // P_TV_MODE_CTRL
#define C_TV_PAL_MODE             0x00000002    // P_TV_MODE_CTRL
#define C_TV_NOINTERLACE_MODE     0x00000000    // P_TV_MODE_CTRL
#define C_TV_INTERLACE_MODE       0x00000001    // P_TV_MODE_CTRL

#define C_TV_SEL_BUFFER1          0x00000000    // P_TV_BUFFER_SEL
#define C_TV_SEL_BUFFER2          0x00000001    // P_TV_BUFFER_SEL
#define C_TV_SEL_BUFFER3          0x00000002    // P_TV_BUFFER_SEL

#define C_TV_Y_NOFILTER           0x00000000    // P_TV_FILTER_SEL
#define C_TV_Y_9TAP               0x00000001    // P_TV_FILTER_SEL
#define C_TV_YUPS_2TAP            0x00000000    // P_TV_FILTER_SEL
#define C_TV_YUPS_3TAP            0x00000004    // P_TV_FILTER_SEL
#define C_TV_YUPS_7TAP            0x00000008    // P_TV_FILTER_SEL
#define C_TV_UV_NOFILTER          0x00000000    // P_TV_FILTER_SEL
#define C_TV_UV_9TAP              0x00000010    // P_TV_FILTER_SEL
#define C_TV_UVUPS_2TAP           0x00000000    // P_TV_FILTER_SEL
#define C_TV_UVUPS_3TAP           0x00000040    // P_TV_FILTER_SEL
#define C_TV_UVUPS_7TAP           0x00000080    // P_TV_FILTER_SEL

#define C_TV_LIGHTGUN0_SEL        0x00000100    // P_TV_LIGHTGUN_SEL
#define C_TV_LIGHTGUN1_SEL        0x00000200    // P_TV_LIGHTGUN_SEL