tw2834.c.bak

TW2834的驱动程序设计。包括各个寄存器标准值设计。对于理解TW2834与ITU656非常有帮助

    printf("\tTW2834_OUTPUT_MOD_SET: 1 d1.\n");
    return;
}

/*
 * set tw2834 record path mod to 1 cif
 * return value: nothing
 */
static void set1cif(int chn)
{
    set_record_normal_1cif(chn);
    printf("\tTW2834_OUTPUT_MOD_SET: 1 cif.\n");
    return;
}

/*
 * set tw2834 record path mod to 4 d1
 * return value: nothing
 */
static void set4d1(void)
{
    set_record_switch(1);
    printf("\tTW2834_OUTPUT_MOD_SET: 4 d1.\n");
    return;
}

/*
 * set tw2834 record path mod to 4 cif
 * return value: nothing
 */
static void set4cif(void)
{
    set_record_frame_quad();
    printf("\tTW2834_OUTPUT_MOD_SET: 4 cif.\n");
    return;
}

/*
 * set tw2834 record path mod to 4 d1
 * return value: nothing
 */
static void set_2halfd1(void)
{
    set_record_2half_d1();
    printf("\tTW2834_OUTPUT_MOD_SET: 2 half d1.\n");
    return;
}

/*
 * set tw2834 record path mod to 4 qcif
 * return value: nothing
 */
static void set4qcif(void)
{
    set_record_normal_quad();
    printf("\tTW2834_OUTPUT_MOD_SET: 4 qcif.\n");
    return;
}

/*
 * set tw2834 record path mod to 2 cif
 * return value: nothing
 */
static void set2cif(void)
{
    set_record_normal_2cif();
    printf("\tTW2834_OUTPUT_MOD_SET: 2 cif.\n");
    return;
}



/****************************** display path control **************************/
/*
 * function: set display path channel region.
 * @param ch: channel number
 * @region defined by (hl,vt)left top (hr,vb)right bottom.
 * @return value: null.
 */
static void set_display_region(unsigned char ch, unsigned char hl, unsigned char hr,
        unsigned char vt, unsigned char vb)
{
    tw2834_write_byte(PAGE1, REG_PICHL+(ch<<2), hl);
    tw2834_write_byte(PAGE1, REG_PICHR+(ch<<2), hr);
    tw2834_write_byte(PAGE1, REG_PICVT+(ch<<2), vt);
    tw2834_write_byte(PAGE1, REG_PICVB+(ch<<2), vb);
}

/*
 * function: set display path d1 mod.
 * @return value: null.
 */
static void set_display_d1(int chn)
{
    tw2834_setvin_scale_ratio(TW2834_PATH_X, chn, 0xffff, 0xffff);

    set_display_region(0, 0, 180, 0, 144);
}

/*
 * function: set display path quad mod.
 * @return value: null.
 */
static void set_display_quad(void)
{
    /*set vin scaling*/
    tw2834_setvin_scale_ratio(TW2834_PATH_X, 0, 0x7fff, 0x7fff);
    tw2834_setvin_scale_ratio(TW2834_PATH_X, 1, 0x7fff, 0x7fff);
    tw2834_setvin_scale_ratio(TW2834_PATH_X, 2, 0x7fff, 0x7fff);
    tw2834_setvin_scale_ratio(TW2834_PATH_X, 3, 0x7fff, 0x7fff);

    set_display_region(0, 0,  90,  0,  72);
    set_display_region(1, 90, 180, 0,  72);
    set_display_region(2, 0,  90,  72, 144);
    set_display_region(3, 90, 180, 72, 144);
}


/****************************** vbi control ***********************************/
/*
 * Channel ID config routine.
 * @param anolog_chid_lines: the line offset of the digatal ID: <20
 * @return value: null.
 */
static void tw2834_ch_id_config(unsigned char anolog_chid_lines)
{
    unsigned char anolog_line_offset;
    unsigned char anolog_line_width;
    unsigned char reg_val;

    anolog_line_width = 0;
    anolog_line_offset = anolog_chid_lines - anolog_line_width - 1;
    reg_val = ((anolog_line_width ) << 5) | (anolog_line_offset & 0x1f);

    /*config the mode :anolog channel ID + digital channel ID*/
    tw2834_write_byte(PAGE1, 0xC1, 0xa0);
    tw2834_write_byte(PAGE1, 0xC2, 0x00);
    tw2834_write_byte(PAGE1, 0xC3, 0x00);

    /*config the offset and line width of anolog channel ID */
    tw2834_write_byte(PAGE1,0xC4,reg_val);
}

/*
 * get digital Channel ID vertical offset routine.
 * @return value: vertical offset.
 */
unsigned char tw2834_get_chid_offsetv(void)
{
    unsigned char anolog_line_offset;
    unsigned char anolog_line_width;
    unsigned char offsetv;
    unsigned char reg_val;

    reg_val = tw2834_read_byte(PAGE1, 0xC1);
    if ((reg_val & 0xa0) != 0xa0)
    {
        printf("\tTW2834_ERROR: channel ID mod is not right.\n");
        return 0;
    }

    reg_val = tw2834_read_byte(PAGE1, 0xC4);

    anolog_line_width = (reg_val >> 5) + 1;
    anolog_line_offset = reg_val & 0x1f;
    offsetv = anolog_line_width + anolog_line_offset;

    return offsetv;
}


/******************************************************************************/
/*
 * initialize the clock
 * return value: nothing
 */
static void setmemclock(unsigned char v_mclk)
{
    unsigned char r_clkctl;

    r_clkctl = tw2834_read_byte(PAGE1,REG_CLK_CTL);         /*... REG_CLK_CTL */
    tw2834_write_byte(PAGE1,REG_MCLK_CTL,v_mclk);           /*... REG_MCLK_CTL*/
    tw2834_write_byte(PAGE1,0x7D,00);                       /*... REG_MCLK_CTL*/
    tw2834_write_byte(PAGE1,REG_CLK_CTL,MEM_INIT|r_clkctl); /*... REG_CLK_CTL */
}

/*
 * initialize the page0's register
 * return value: nothing
 */
static void tw2834_initpage0(int norm)
{
    unsigned char  t1;

    if(norm == VIDEO_NORM_NTSC){
        for (t1=0; t1<4; t1++){
            tw2834_write_table(PAGE0,0x00+0x40*t1,tbl_ntsc_page0_common,36);
            tw2834_write_byte(PAGE0,0x22+0x40*t1,t1);
            }

        tw2834_write_table(PAGE0,0x38,tbl_ntsc_page0_sfr1,8);
        tw2834_write_table(PAGE0,0x78,tbl_ntsc_page0_sfr2,8);
        tw2834_write_table(PAGE0,0xb8,tbl_ntsc_page0_sfr3,8);
        tw2834_write_table(PAGE0,0xf8,tbl_ntsc_page0_sfr4,8);
        }
    else{
        for(t1=0; t1<4; t1++){
            tw2834_write_table(PAGE0,0x00+0x40*t1,tbl_pal_page0_common,36);
            tw2834_write_byte(PAGE0,0x22+0x40*t1,t1);
        }

        tw2834_write_table(PAGE0,0x38,tbl_pal_page0_sfr1,8);
        tw2834_write_table(PAGE0,0x78,tbl_pal_page0_sfr2,8);
        tw2834_write_table(PAGE0,0xb8,tbl_pal_page0_sfr3,8);
        tw2834_write_table(PAGE0,0xf8,tbl_pal_page0_sfr4,8);
    }
}

/*
 * initialize the page1's register
 * return value: nothing
 */
static void tw2834_initpage1(int norm)
{
    unsigned char t1;

    tw2834_write_table(PAGE1,0x01,tbl_page1_x_com,15);
    tw2834_write_table(PAGE1,0x10,tbl_page1_x_ch_nrml,32);
    tw2834_write_table(PAGE1,0x50,tbl_page1_y_com,16);
    tw2834_write_table(PAGE1,0x60,tbl_page1_y_ch_nrml_pic_quad,16);
    tw2834_write_table(PAGE1,0x70,tbl_page1_cas_popup,14);

    if(norm==VIDEO_NORM_NTSC){
        tw2834_write_table(PAGE1,0x30,tbl_ntsc_page1_x_pic_quad,16);
        tw2834_write_table(PAGE1,0x40,tbl_ntsc_page1_dumy,16);
        tw2834_write_table(PAGE1,0x80,tbl_ntsc_page1_enc,15);
        tw2834_write_byte(PAGE1,0x00,0x00);
    }
    else{
        tw2834_write_table(PAGE1,0x30,tbl_pal_page1_x_pic_quad,16);
        tw2834_write_table(PAGE1,0x40,tbl_pal_page1_dumy,16);
        tw2834_write_table(PAGE1,0x80,tbl_pal_page1_enc,15);
        tw2834_write_byte(PAGE1,0x00,0x80);
    }

    tw2834_write_table(PAGE1,0xc0,tbl_page1_channel_id_ctrl,16);

    tw2834_write_byte(PAGE1,REG_CLK_CTL,0x41);           /*... DAC clock control*/

    tw2834_write_byte(PAGE1,REG_MPP_SET,0xbb);

    for (t1 = 0; t1 < 4; t1++) {
        tw2834_write_byte(PAGE1,REG_QUE_DATA,t1);
        tw2834_write_byte(PAGE1,REG_QUE_ADDR,QUE_WR|t1);
    }
    tw2834_write_byte(PAGE1,0x8d,0x60);                  /*... when cascade*/
    tw2834_write_byte(PAGE1,0x80,0x22);                  /*... when cascade*/
}

/*
 * initialize the page2's register
 * return value: nothing
 */
static void tw2834_initpage2(int norm)
{
    unsigned char t1;
    unsigned char reg_curctl;

    tw2834_write_table(PAGE2,0x00,tbl_page2_cur_3d_box,96);
    if (norm == VIDEO_NORM_NTSC)
        tw2834_write_table(PAGE2,0x60,tbl_ntsc_page2_ary_box,32);
    else
        tw2834_write_table(PAGE2,0x60,tbl_pal_page2_ary_box,32);
    for (t1 = 0; t1 < 4; t1++) {
        tw2834_write_table(PAGE2,0x80+0x20*t1,tbl_page2_motn_sens,6);
        tw2834_write_table(PAGE2,0x86+0x20*t1,tbl_page2_motn_mask,24);
    }

    reg_curctl = tw2834_read_byte(PAGE2,REG_CURCTL);
}

/*
 * first initialize tw2834 routine
 * return value: nothing
 */
static void tw2834_init_0(void)
{
    unsigned char reg;

    reg = tw2834_read_byte(PAGE0,0xFE);
    if(reg==0x10)
        setmemclock(0x99);  /*rev version B*/
    else if(reg==0x11)
        setmemclock(0x77);  /*rev version C*/
    //udelay(1000);           /*delay 1ms    */
}

/*
 * second initialize tw2834 routine
 * return value: nothing
 */
static void tw2834_init_1(void)
{
    tw2834_initpage0(norm_mode);
    tw2834_initpage1(norm_mode);
    tw2834_initpage2(norm_mode);

    /*set the digital channel ID offset default 10*/
    tw2834_ch_id_config(10);
    set_display_d1(0);

    if (mchannel == 0)
    {
        if (videosize == 0)
        {
            set1cif(0);
        }
        else if (videosize == 1)
        {
            setd1(0);
        }
    }
    else
    {
        if (videosize == 0)
        {
            set4cif();
        }
        else if (videosize == 1)
        {
            set_2halfd1();
        }
        else if (videosize == 2)
        {
            set4d1();
            return;
        }
        else if (videosize == 3)
        {
            set4qcif();
            return;
        }
        else if (videosize == 4)
        {
            set2cif();
            return;
        }
        else
        {
            setd1(0);
            return;
        }
    }
}

/*
 * tw2834 read routine.
 * do nothing.
 */
int tw2834_read()
{
    return 0;
}

/*
 * tw2834 write routine.
 * do nothing.
 */
int tw2834_write()
{
    return 0;
}

/*
 * tw2834 open routine.
 * do nothing.
 */
int tw2834_open(struct inode * inode, struct file * file)
{
    return 0;
}

/*
 * tw2834 close routine.
 * do nothing.
 */
int tw2834_close(struct inode * inode, struct file * file)
{
    return 0;
}


/*
 *      The various file operations we support.
 */

/*
 * tw2834 device initializing routine
 */
//static int tw2834_device_init(void)
int main(void)
{
    init_gpio_control();
    tw2834_init_0();
    tw2834_init_1();

    return 0;
}