progpidreg.v

华大机顶盒源码(包括所有源代码).rar

module ProgPidReg (CLKM, ResetN,
                    I2C_PT_A, I2C_PT_DB, I2C_PT_WR, K,  
                    Info_PID, Video_PID,Audio_PID
                   );
input   CLKM;
input   ResetN;

input   [5:0] I2C_PT_A;
input   [7:0] I2C_PT_DB;
input         I2C_PT_WR;
input         K;

output  [12:0] Audio_PID;
output  [12:0] Info_PID;
output  [12:0] Video_PID;

reg     [12:0] Audio_PID;
reg     [12:0] Info_PID;
reg     [12:0] Video_PID;


// ONE HOT ENCODED state machine: Sreg0
parameter Idle = 5'b00001, 
          SET_AUDIO_PID = 5'b00010, 
          SET_INFO_PID = 5'b00100, 
          SET_REG1 = 5'b10000, 
          SET_VIDEO_PID = 5'b01000;
          
reg [6:0] CurrState_Sreg0;

// Diagram actions (continuous assignments allowed only: assign ...)
//diagram ACTIONS;

// Machine: Sreg0

// NextState logic (combinatorial)
always @ (posedge CLKM or negedge ResetN)
if(!ResetN) begin
	CurrState_Sreg0 <= Idle;
	Audio_PID <= 0;
	Video_PID <= 0;
	Info_PID <= 0;
end
else begin
	case (CurrState_Sreg0)
		Idle:
		begin
			Audio_PID <= 0;
			Video_PID <= 0;
			Info_PID <= 0;
			begin
				CurrState_Sreg0 <= SET_REG1;
			end
		end
		SET_AUDIO_PID:
		begin
			if (I2C_PT_WR==0)
			begin
				CurrState_Sreg0 <= SET_AUDIO_PID;
			end	else    begin
				CurrState_Sreg0 <= SET_REG1;
				Audio_PID[7:0] <= I2C_PT_DB;
			end
		end
		SET_INFO_PID:
		begin
			if (I2C_PT_WR==0)
			begin
				CurrState_Sreg0 <= SET_INFO_PID;
			end     else	begin
				CurrState_Sreg0 <= SET_REG1;
				Info_PID[7:0] <= I2C_PT_DB;
			end
		end
		SET_VIDEO_PID:
		begin
			if (I2C_PT_WR==0)
			begin
				CurrState_Sreg0 <= SET_VIDEO_PID;
			end	else	begin
				CurrState_Sreg0 <= SET_REG1;
				Video_PID[7:0] <= I2C_PT_DB;
			end
		end
		SET_REG1:
		begin
			if ((K==0) || (I2C_PT_WR==0) || (I2C_PT_A[0]==1)||(I2C_PT_DB[7]==0) || (I2C_PT_DB[6:5]==2'b00) )
			begin
				CurrState_Sreg0 <= SET_REG1;
			end
			else if (I2C_PT_DB[6:5]==3'b11)
			begin
				CurrState_Sreg0 <= SET_INFO_PID;
				Info_PID[12:8] <= I2C_PT_DB[4:0];
			end
			else if (I2C_PT_DB[6:5]==3'b10)
			begin
				CurrState_Sreg0 <= SET_VIDEO_PID;
				Video_PID[12:8] <= I2C_PT_DB[4:0];
			end	else	begin
				CurrState_Sreg0 <= SET_AUDIO_PID;
				Audio_PID[12:8] <= I2C_PT_DB[4:0];
			end
		end
		default:
		begin
			// trap state
			CurrState_Sreg0 <= Idle;
		end
	endcase
end

endmodule