📄 ac97.c
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/* * ac97.c * * JzSOC On-Chip AC97 audio driver. * * Author: Seeger Chin * e-mail: seeger.chin@gmail.com * * Copyright (C) 2006 Ingenic Semiconductor Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */#include <includes.h>#include <regs.h>#include <ops.h>#include "pcm.h"static unsigned int k_8000[] = { 0, 42, 85, 128, 170, 213, };static unsigned int reload_8000[] = { 1, 0, 0, 0, 0, 0, };static unsigned int k_11025[] = { 0, 58, 117, 176, 234, 37, 96, 154, 213, 16, 74, 133, 192, 250, 53, 112, 170, 229, 32, 90, 149, 208, 10, 69, 128, 186, 245, 48, 106, 165, 224, 26, 85, 144, 202, 5, 64, 122, 181, 240, 42, 101, 160, 218, 21, 80, 138, 197, };static unsigned int reload_11025[] = { 1, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, };static unsigned int k_16000[] = { 0, 85, 170, };static unsigned int reload_16000[] = { 1, 0, 0, };static unsigned int k_22050[] = { 0, 117, 234, 96, 213, 74, 192, 53, 170, 32, 149, 10, 128, 245, 106, 224, 85, 202, 64, 181, 42, 160, 21, 138, };static unsigned int reload_22050[] = { 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, };static unsigned int k_24000[] = { 0, 128, };static unsigned int reload_24000[] = { 1, 0, };static unsigned int k_32000[] = { 0, 170, 85, };static unsigned int reload_32000[] = { 1, 0, 1, };static unsigned int k_44100[] = { 0, 234, 213, 192, 170, 149, 128, 106, 85, 64, 42, 21, };static unsigned int reload_44100[] = { 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, };static unsigned int k_48000[] = { 0, };static unsigned int reload_48000[] = { 1, };static unsigned int f_scale_counts[8] = { 6, 48, 3, 24, 2, 3, 12, 1, };/* AC97 1.0 */#define AC97_RESET 0x0000 //#define AC97_MASTER_VOL_STEREO 0x0002 // Line Out#define AC97_HEADPHONE_VOL 0x0004 // #define AC97_MASTER_VOL_MONO 0x0006 // TAD Output#define AC97_MASTER_TONE 0x0008 //#define AC97_PCBEEP_VOL 0x000a // none#define AC97_PHONE_VOL 0x000c // TAD Input (mono)#define AC97_MIC_VOL 0x000e // MIC Input (mono)#define AC97_LINEIN_VOL 0x0010 // Line Input (stereo)#define AC97_CD_VOL 0x0012 // CD Input (stereo)#define AC97_VIDEO_VOL 0x0014 // none#define AC97_AUX_VOL 0x0016 // Aux Input (stereo)#define AC97_PCMOUT_VOL 0x0018 // Wave Output (stereo)#define AC97_RECORD_SELECT 0x001a //#define AC97_RECORD_GAIN 0x001c#define AC97_RECORD_GAIN_MIC 0x001e#define AC97_GENERAL_PURPOSE 0x0020#define AC97_3D_CONTROL 0x0022#define AC97_MODEM_RATE 0x0024#define AC97_POWER_CONTROL 0x0026/* AC'97 2.0 */#define AC97_EXTENDED_ID 0x0028 /* Extended Audio ID */#define AC97_EXTENDED_STATUS 0x002A /* Extended Audio Status */#define AC97_PCM_FRONT_DAC_RATE 0x002C /* PCM Front DAC Rate */#define AC97_PCM_SURR_DAC_RATE 0x002E /* PCM Surround DAC Rate */#define AC97_PCM_LFE_DAC_RATE 0x0030 /* PCM LFE DAC Rate */#define AC97_PCM_LR_ADC_RATE 0x0032 /* PCM LR ADC Rate */#define AC97_PCM_MIC_ADC_RATE 0x0034 /* PCM MIC ADC Rate */#define AC97_CENTER_LFE_MASTER 0x0036 /* Center + LFE Master Volume */#define AC97_SURROUND_MASTER 0x0038 /* Surround (Rear) Master Volume */#define AC97_RESERVED_3A 0x003A /* Reserved in AC '97 < 2.2 *//* AC'97 2.2 */#define AC97_SPDIF_CONTROL 0x003A /* S/PDIF Control *//* range 0x3c-0x58 - MODEM */#define AC97_EXTENDED_MODEM_ID 0x003C#define AC97_EXTEND_MODEM_STAT 0x003E#define AC97_LINE1_RATE 0x0040#define AC97_LINE2_RATE 0x0042#define AC97_HANDSET_RATE 0x0044#define AC97_LINE1_LEVEL 0x0046#define AC97_LINE2_LEVEL 0x0048#define AC97_HANDSET_LEVEL 0x004A#define AC97_GPIO_CONFIG 0x004C#define AC97_GPIO_POLARITY 0x004E#define AC97_GPIO_STICKY 0x0050#define AC97_GPIO_WAKE_UP 0x0052#define AC97_GPIO_STATUS 0x0054#define AC97_MISC_MODEM_STAT 0x0056#define AC97_RESERVED_58 0x0058/* registers 0x005a - 0x007a are vendor reserved */#define AC97_VENDOR_ID1 0x007c#define AC97_VENDOR_ID2 0x007e/* volume control bit defines */#define AC97_MUTE 0x8000#define AC97_MICBOOST 0x0040#define AC97_LEFTVOL 0x3f00#define AC97_RIGHTVOL 0x003f/* record mux defines */#define AC97_RECMUX_MIC 0x0000#define AC97_RECMUX_CD 0x0101#define AC97_RECMUX_VIDEO 0x0202#define AC97_RECMUX_AUX 0x0303#define AC97_RECMUX_LINE 0x0404#define AC97_RECMUX_STEREO_MIX 0x0505#define AC97_RECMUX_MONO_MIX 0x0606#define AC97_RECMUX_PHONE 0x0707/* general purpose register bit defines */#define AC97_GP_LPBK 0x0080 /* Loopback mode */#define AC97_GP_MS 0x0100 /* Mic Select 0=Mic1, 1=Mic2 */#define AC97_GP_MIX 0x0200 /* Mono output select 0=Mix, 1=Mic */#define AC97_GP_RLBK 0x0400 /* Remote Loopback - Modem line codec */#define AC97_GP_LLBK 0x0800 /* Local Loopback - Modem Line codec */#define AC97_GP_LD 0x1000 /* Loudness 1=on */#define AC97_GP_3D 0x2000 /* 3D Enhancement 1=on */#define AC97_GP_ST 0x4000 /* Stereo Enhancement 1=on */#define AC97_GP_POP 0x8000 /* Pcm Out Path, 0=pre 3D, 1=post 3D *//* extended audio status and control bit defines */#define AC97_EA_VRA 0x0001 /* Variable bit rate enable bit */#define AC97_EA_DRA 0x0002 /* Double-rate audio enable bit */#define AC97_EA_SPDIF 0x0004 /* S/PDIF Enable bit */#define AC97_EA_VRM 0x0008 /* Variable bit rate for MIC enable bit */#define AC97_EA_CDAC 0x0040 /* PCM Center DAC is ready (Read only) */#define AC97_EA_SDAC 0x0040 /* PCM Surround DACs are ready (Read only) */#define AC97_EA_LDAC 0x0080 /* PCM LFE DAC is ready (Read only) */#define AC97_EA_MDAC 0x0100 /* MIC ADC is ready (Read only) */#define AC97_EA_SPCV 0x0400 /* S/PDIF configuration valid (Read only) */#define AC97_EA_PRI 0x0800 /* Turns the PCM Center DAC off */#define AC97_EA_PRJ 0x1000 /* Turns the PCM Surround DACs off */#define AC97_EA_PRK 0x2000 /* Turns the PCM LFE DAC off */#define AC97_EA_PRL 0x4000 /* Turns the MIC ADC off */#define AC97_EA_SLOT_MASK 0xffcf /* Mask for slot assignment bits */#define AC97_EA_SPSA_3_4 0x0000 /* Slot assigned to 3 & 4 */#define AC97_EA_SPSA_7_8 0x0010 /* Slot assigned to 7 & 8 */#define AC97_EA_SPSA_6_9 0x0020 /* Slot assigned to 6 & 9 */#define AC97_EA_SPSA_10_11 0x0030 /* Slot assigned to 10 & 11 *//* S/PDIF control bit defines */#define AC97_SC_PRO 0x0001 /* Professional status */#define AC97_SC_NAUDIO 0x0002 /* Non audio stream */#define AC97_SC_COPY 0x0004 /* Copyright status */#define AC97_SC_PRE 0x0008 /* Preemphasis status */#define AC97_SC_CC_MASK 0x07f0 /* Category Code mask */#define AC97_SC_L 0x0800 /* Generation Level status */#define AC97_SC_SPSR_MASK 0xcfff /* S/PDIF Sample Rate bits */#define AC97_SC_SPSR_44K 0x0000 /* Use 44.1kHz Sample rate */#define AC97_SC_SPSR_48K 0x2000 /* Use 48kHz Sample rate */#define AC97_SC_SPSR_32K 0x3000 /* Use 32kHz Sample rate */#define AC97_SC_DRS 0x4000 /* Double Rate S/PDIF */#define AC97_SC_V 0x8000 /* Validity status *//* powerdown control and status bit defines *//* status */#define AC97_PWR_MDM 0x0010 /* Modem section ready */#define AC97_PWR_REF 0x0008 /* Vref nominal */#define AC97_PWR_ANL 0x0004 /* Analog section ready */#define AC97_PWR_DAC 0x0002 /* DAC section ready */#define AC97_PWR_ADC 0x0001 /* ADC section ready *//* control */#define AC97_PWR_PR0 0x0100 /* ADC and Mux powerdown */#define AC97_PWR_PR1 0x0200 /* DAC powerdown */#define AC97_PWR_PR2 0x0400 /* Output mixer powerdown (Vref on) */#define AC97_PWR_PR3 0x0800 /* Output mixer powerdown (Vref off) */#define AC97_PWR_PR4 0x1000 /* AC-link powerdown */#define AC97_PWR_PR5 0x2000 /* Internal Clk disable */#define AC97_PWR_PR6 0x4000 /* HP amp powerdown */#define AC97_PWR_PR7 0x8000 /* Modem off - if supported *//* extended audio ID register bit defines */#define AC97_EXTID_VRA 0x0001#define AC97_EXTID_DRA 0x0002#define AC97_EXTID_SPDIF 0x0004#define AC97_EXTID_VRM 0x0008#define AC97_EXTID_DSA0 0x0010#define AC97_EXTID_DSA1 0x0020#define AC97_EXTID_CDAC 0x0040#define AC97_EXTID_SDAC 0x0080#define AC97_EXTID_LDAC 0x0100#define AC97_EXTID_AMAP 0x0200#define AC97_EXTID_REV0 0x0400#define AC97_EXTID_REV1 0x0800#define AC97_EXTID_ID0 0x4000#define AC97_EXTID_ID1 0x8000/* extended status register bit defines */#define AC97_EXTSTAT_VRA 0x0001#define AC97_EXTSTAT_DRA 0x0002#define AC97_EXTSTAT_SPDIF 0x0004#define AC97_EXTSTAT_VRM 0x0008#define AC97_EXTSTAT_SPSA0 0x0010#define AC97_EXTSTAT_SPSA1 0x0020#define AC97_EXTSTAT_CDAC 0x0040#define AC97_EXTSTAT_SDAC 0x0080#define AC97_EXTSTAT_LDAC 0x0100#define AC97_EXTSTAT_MADC 0x0200#define AC97_EXTSTAT_SPCV 0x0400#define AC97_EXTSTAT_PRI 0x0800#define AC97_EXTSTAT_PRJ 0x1000#define AC97_EXTSTAT_PRK 0x2000#define AC97_EXTSTAT_PRL 0x4000/* useful power states */#define AC97_PWR_D0 0x0000 /* everything on */#define AC97_PWR_D1 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR4#define AC97_PWR_D2 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4#define AC97_PWR_D3 AC97_PWR_PR0|AC97_PWR_PR1|AC97_PWR_PR2|AC97_PWR_PR3|AC97_PWR_PR4#define AC97_PWR_ANLOFF AC97_PWR_PR2|AC97_PWR_PR3 /* analog section off *//* Total number of defined registers. */#define AC97_REG_CNT 64/* OSS interface to the ac97s.. */#define AC97_STEREO_MASK (SOUND_MASK_VOLUME|SOUND_MASK_PCM|\ SOUND_MASK_LINE|SOUND_MASK_CD|\ SOUND_MASK_ALTPCM|SOUND_MASK_IGAIN|\ SOUND_MASK_LINE1|SOUND_MASK_VIDEO)#define AC97_SUPPORTED_MASK (AC97_STEREO_MASK | \ SOUND_MASK_BASS|SOUND_MASK_TREBLE|\ SOUND_MASK_SPEAKER|SOUND_MASK_MIC|\ SOUND_MASK_PHONEIN|SOUND_MASK_PHONEOUT)#define AC97_RECORD_MASK (SOUND_MASK_MIC|\ SOUND_MASK_CD|SOUND_MASK_IGAIN|SOUND_MASK_VIDEO|\ SOUND_MASK_LINE1| SOUND_MASK_LINE|\ SOUND_MASK_PHONEIN)#ifndef u8#define u8 unsigned char#endif#ifndef u16#define u16 unsigned short#endif#ifndef u32#define u32 unsigned int#endif#define AUDIO_READ_DMA 0#define AUDIO_WRITE_DMA 1#ifdef PHYADDR#undef PHYADDR#endif#define PHYADDR(n) ((n) & 0x1fffffff)#ifdef KSEG1ADDR#undef KSEG1ADDR#endif#define KSEG1ADDR(n) (PHYADDR(n) | 0xa0000000)#ifdef PAGE_SIZE#undef PAGE_SIZE#endif#define PAGE_SIZE 0x1000extern void printf(const char *fmt, ...);static const struct { unsigned int id; char *name;} ac97_codec_ids[] = { {0x41445303, "Analog Devices AD1819"}, {0x41445340, "Analog Devices AD1881"}, {0x41445348, "Analog Devices AD1881A"}, {0x41445360, "Analog Devices AD1885"}, {0x41445361, "Analog Devices AD1886"}, {0x41445460, "Analog Devices AD1885"}, {0x41445461, "Analog Devices AD1886"}, {0x414B4D00, "Asahi Kasei AK4540"}, {0x414B4D01, "Asahi Kasei AK4542"}, {0x414B4D02, "Asahi Kasei AK4543"}, {0x414C4710, "ALC200/200P"}, {0x414C4720, "ALC650"}, {0x43525900, "Cirrus Logic CS4297"}, {0x43525903, "Cirrus Logic CS4297"}, {0x43525913, "Cirrus Logic CS4297A rev A"}, {0x43525914, "Cirrus Logic CS4297A rev B"}, {0x43525923, "Cirrus Logic CS4298"}, {0x4352592B, "Cirrus Logic CS4294"}, {0x4352592D, "Cirrus Logic CS4294"}, {0x43525931, "Cirrus Logic CS4299 rev A"}, {0x43525933, "Cirrus Logic CS4299 rev C"}, {0x43525934, "Cirrus Logic CS4299 rev D"}, {0x4352594d, "Cirrus Logic CS4201"}, {0x45838308, "ESS Allegro ES1988"}, {0x49434511, "ICE1232"}, {0x4e534331, "National Semiconductor LM4549"}, {0x50534304, "Philips UCB1400"}, {0x53494c22, "Silicon Laboratory Si3036"}, {0x53494c23, "Silicon Laboratory Si3038"}, {0x545200FF, "TriTech TR?????"}, {0x54524102, "TriTech TR28022"}, {0x54524103, "TriTech TR28023"}, {0x54524106, "TriTech TR28026"}, {0x54524108, "TriTech TR28028"}, {0x54524123, "TriTech TR A5"}, {0x574D4C00, "Wolfson WM9700A"}, {0x574D4C03, "Wolfson WM9703/WM9707"}, {0x574D4C04, "Wolfson WM9704M/WM9704Q"}, {0x83847600, "SigmaTel STAC????"}, {0x83847604, "SigmaTel STAC9701/3/4/5"}, {0x83847605, "SigmaTel STAC9704"}, {0x83847608, "SigmaTel STAC9708"}, {0x83847609, "SigmaTel STAC9721/23"}, {0x83847644, "SigmaTel STAC9744/45"}, {0x83847656, "SigmaTel STAC9756/57"}, {0x83847666, "SigmaTel STAC9750T"}, {0x83847684, "SigmaTel STAC9783/84?"}, {0x57454301, "Winbond 83971D"}, {0xffffffff, "End flag"},};void ac97codec_info(unsigned short id1, unsigned short id2){ int i; unsigned int id = (id1 << 16) | id2; for (i=0;;i++) { if (ac97_codec_ids[i].id == 0xffffffff) { printf("AC97 codec: Unknown codec (%04x %04x)\n", id1, id2); break; } if (ac97_codec_ids[i].id == id) { printf("AC97 codec: %s\n", ac97_codec_ids[i].name); break; } }}/* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */#define NR_AC97 2#define STANDARD_SPEED 48000#define MAX_RETRY 100static int jz_audio_rate;static char jz_audio_format;static char jz_audio_channels;static int jz_audio_k; /* rate expand multiple, for record */static int jz_audio_q; /* rate expand compensate, for record */static int jz_audio_count; /* total count of voice data */static int last_jz_audio_count;static int bitscale;static unsigned int f_scale_count;static unsigned int *f_scale_array;static unsigned int *f_scale_reload;static unsigned int f_scale_idx;static void jz_update_filler(int bits, int channels);static void jz_ac97_replay_dma_irq(unsigned int);static void jz_ac97_record_dma_irq(unsigned int);static void (*replay_filler)(unsigned long src_start, int count, int id);static int (*record_filler)(unsigned long dst_start, int count, int id);extern u16 ac97_codec_read(u8 reg);extern void ac97_codec_write(u8 reg, u16 data);#define QUEUE_MAX 2typedef struct buffer_queue_s { int count; int id[QUEUE_MAX]; int lock;} buffer_queue_t;static unsigned long out_dma_buf[QUEUE_MAX+1];static unsigned long out_dma_pbuf[QUEUE_MAX+1];static unsigned long out_dma_buf_data_count[QUEUE_MAX+1];static unsigned long in_dma_buf[QUEUE_MAX+1];static unsigned long in_dma_pbuf[QUEUE_MAX+1];static unsigned long in_dma_buf_data_count[QUEUE_MAX+1];static buffer_queue_t out_empty_queue;static buffer_queue_t out_full_queue;static buffer_queue_t out_busy_queue;static buffer_queue_t in_empty_queue;static buffer_queue_t in_full_queue;static buffer_queue_t in_busy_queue;static int first_record_call = 1;static OS_EVENT *tx_sem;static OS_EVENT *rx_sem;static inline int get_buffer_id(struct buffer_queue_s *q){ int r; unsigned long flags; int i; flags = spin_lock_irqsave(); if (q->count == 0) return -1; r = q->id[0]; for (i=0;i < q->count-1;i++) q->id[i] = q->id[i+1]; q->count --; spin_unlock_irqrestore(flags); return r;}static inline void put_buffer_id(struct buffer_queue_s *q, int id)⌨️ 快捷键说明
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