test.asm
来自「NEC 78K0S系列 9222仿真初始化设置」· 汇编 代码 · 共 237 行
ASM
237 行
; 78K/0S Series C Compiler V2.00 Assembler Source
; Date:29 Nov 2007 Time:19:01:31
; Command : -ftest.pcc
; In-file : test.c
; Asm-file : test.asm
; Para-file : -cF9222
; -y"C:\Program Files\NEC Electronics Tools\DEV"
; -_msgoff
; -a
; -zp
; -no
; test.c
$PROCESSOR(F9222)
$DEBUG
$NODEBUGA
$KANJICODE SJIS
$TOL_INF 03FH, 0200H, 00H, 00H
$DGS FIL_NAM, .file, 026H, 0FFFEH, 03FH, 067H, 01H, 00H
$DGS AUX_FIL, test.c
$DGS MOD_NAM, test, 00H, 0FFFEH, 00H, 077H, 00H, 00H
$DGS SEC_NAM, @@BITS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, OPT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, OPT1, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, OPT2, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, OPT3, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@R_INIT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@INIT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@DATA, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@R_INIS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@INIS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@DATS, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@CALT, U, U, 00H, 078H, 00H, 00H
$DGS SEC_NAM, @@CODE, U, U, 00H, 078H, 00H, 00H
$DGS GLV_SYM, _main, U, U, 08001H, 020H, 01H, 02H
$DGS AUX_FUN, 00H, U, U, 026H, 00H
$DGS BEG_FUN, ??bf_main, U, U, 00H, 065H, 01H, 00H
$DGS AUX_BEG, 010H, 04H, 014H
$DGS BEG_BLK, ??bb00_main, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 0AH, 00H, 01AH
$DGS AUT_VAR, _i, 02H, 0FFFFH, 04H, 01H, 01H, 00H
$DGS AUX_STR, 00H, 0BH, 02H, 00H, 00H, 00H, 00H
$DGS AUT_VAR, _j, 00H, 0FFFFH, 04H, 01H, 01H, 00H
$DGS AUX_STR, 00H, 0BH, 02H, 00H, 00H, 00H, 00H
$DGS BEG_BLK, ??bb01_main, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 0EH, 00H, 01CH
$DGS BEG_BLK, ??bb02_main, U, U, 00H, 064H, 01H, 00H
$DGS AUX_BEG, 010H, 00H, 00H
$DGS END_BLK, ??eb02_main, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 014H
$DGS END_BLK, ??eb01_main, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 015H
$DGS END_BLK, ??eb00_main, U, U, 00H, 064H, 01H, 00H
$DGS AUX_END, 017H
$DGS END_FUN, ??ef_main, U, U, 00H, 065H, 01H, 00H
$DGS AUX_END, 018H
$DGS GLV_SYM, _OPTION, U, U, 05002H, 020H, 00H, 00H
$DGS GLV_SYM, _OPTION1, U, U, 05002H, 020H, 00H, 00H
$DGS GLV_SYM, _OPTION2, U, U, 05002H, 020H, 00H, 00H
$DGS GLV_SYM, _OPTION3, U, U, 05002H, 020H, 00H, 00H
$DGS GLV_SYM, _@cprep, U, U, 00H, 02H, 00H, 00H
EXTRN _@cprep
PUBLIC _OPTION
PUBLIC _OPTION1
PUBLIC _OPTION2
PUBLIC _OPTION3
PUBLIC _main
@@BITS BSEG
OPT CSEG AT 80H
_OPTION: DB 095H ; 149
OPT1 CSEG AT 81H
_OPTION1: DB 0FFH ; 255
OPT2 CSEG AT 18H
_OPTION2: DB 0FFH ; 255
OPT3 CSEG AT 7EH
_OPTION3: DB 0FFH ; 255
@@R_INIT CSEG
@@INIT DSEG
@@DATA DSEG
@@R_INIS CSEG UNITP
@@INIS DSEG SADDRP
@@DATS DSEG SADDRP
@@CALT CSEG CALLT0
; line 7
; line 9
; line 11
; line 13
; line 16
@@CODE CSEG
_main:
$DGL 1,16
di ;[INF] 3, 6
push hl ;[INF] 1, 4
movw ax,#04H ;[INF] 3, 6
callt [_@cprep] ;[INF] 1, 8
??bf_main:
; line 18
$DGL 0,3
mov PCC,#00H ; 0 ;[INF] 3, 6
; line 19
$DGL 0,4
mov PPCC,#00H ; 0 ;[INF] 3, 6
; line 20
$DGL 0,5
mov PM4,#0F2H ; 242 ;[INF] 3, 6
; line 21
$DGL 0,6
mov INTM1,#01H ; 1 ;[INF] 3, 6
; line 22
$DGL 0,7
mov MK1,#0F1H ; 241 ;[INF] 3, 6
; line 23
$DGL 0,8
ei ;[INF] 3, 6
; line 24
?L0003:
; line 25
??bb00_main:
; line 27
$DGL 0,12
mov WDTE,#0ACH ; 172 ;[INF] 3, 6
; line 28
$DGL 0,13
xor a,a ;[INF] 2, 4
mov [hl+2],a ; i ;[INF] 2, 6
mov [hl+3],a ; i ;[INF] 2, 6
?L0005:
mov a,[hl+2] ; i ;[INF] 2, 6
xch a,x ;[INF] 1, 4
mov a,[hl+3] ; i ;[INF] 2, 6
xor a,#080H ; 128 ;[INF] 2, 4
cmpw ax,#083E8H ; -31768 ;[INF] 3, 6
bnc $?L0006 ;[INF] 2, 6
; line 29
??bb01_main:
; line 30
$DGL 0,15
xor a,a ;[INF] 2, 4
mov [hl],a ; j ;[INF] 1, 6
mov [hl+1],a ; j ;[INF] 2, 6
?L0008:
mov a,[hl] ; j ;[INF] 1, 6
xch a,x ;[INF] 1, 4
mov a,[hl+1] ; j ;[INF] 2, 6
xor a,#080H ; 128 ;[INF] 2, 4
cmpw ax,#08064H ; -32668 ;[INF] 3, 6
bnc $?L0009 ;[INF] 2, 6
; line 31
??bb02_main:
; line 32
$DGL 0,17
nop ;[INF] 1, 2
; line 33
$DGL 0,18
nop ;[INF] 1, 2
; line 34
$DGL 0,19
nop ;[INF] 1, 2
??eb02_main:
; line 35
$DGL 0,20
mov a,[hl] ; j ;[INF] 1, 6
xch a,x ;[INF] 1, 4
mov a,[hl+1] ; j ;[INF] 2, 6
incw ax ;[INF] 1, 4
mov [hl+1],a ; j ;[INF] 2, 6
xch a,x ;[INF] 1, 4
mov [hl],a ; j ;[INF] 1, 6
br $?L0008 ;[INF] 2, 6
?L0009:
??eb01_main:
; line 36
$DGL 0,21
mov a,[hl+2] ; i ;[INF] 2, 6
xch a,x ;[INF] 1, 4
mov a,[hl+3] ; i ;[INF] 2, 6
incw ax ;[INF] 1, 4
mov [hl+3],a ; i ;[INF] 2, 6
xch a,x ;[INF] 1, 4
mov [hl+2],a ; i ;[INF] 2, 6
br $?L0005 ;[INF] 2, 6
?L0006:
; line 37
$DGL 0,22
set1 CY ;[INF] 1, 2
bt P4.3,$?L0011 ;[INF] 4,10
clr1 CY ;[INF] 1, 2
?L0011:
not1 CY ;[INF] 1, 2
bnc $?L0012 ;[INF] 2, 6
set1 P4.3 ;[INF] 3, 6
br $?L0003 ;[INF] 2, 6
?L0012:
clr1 P4.3 ;[INF] 3, 6
??eb00_main:
; line 38
$DGL 0,23
br $?L0003 ;[INF] 2, 6
; line 39
$DGL 0,24
??ef_main:
pop ax ;[INF] 1, 6
pop ax ;[INF] 1, 6
pop hl ;[INF] 1, 6
ret ;[INF] 1, 6
??ee_main:
END
; *** Code Information ***
;
; $FILE D:\MINCUBE_TOW_9211\MINCUBE_TOW_9211\test.c
;
; $FUNC main(16)
; void=(void)
; CODE SIZE= 113 bytes, CLOCK_SIZE= 322 clocks, STACK_SIZE= 8 bytes
; Target chip : uPD78F9222
; Device file : V3.10
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