psocgpioint.inc

这是cypress公司的一个STAR无线网络的参考设计。本人从此出发

; Generated by PSoC Designer ver 4.1 b931 : 21 January, 2004
;
;
;  PSoCGPIOINT.inc
;
;  Data: 29 October, 2001
;  Copyright Cypress MicroSystems 2001
;
;  This file is generated by the Device Editor on Application Generation.
;  It contains equates that are useful in writing code relating to GPIO
;  related interrupts.
;  
;  DO NOT EDIT THIS FILE MANUALLY, AS IT IS OVERWRITTEN!!!
;  Edits to this file will not be preserved.
;
; RADIO_NIRQ address and mask equates
RADIO_NIRQ_Data_ADDR:	equ	4h
RADIO_NIRQ_DriveMode_0_ADDR:	equ	104h
RADIO_NIRQ_DriveMode_1_ADDR:	equ	105h
RADIO_NIRQ_DriveMode_2_ADDR:	equ	7h
RADIO_NIRQ_GlobalSelect_ADDR:	equ	6h
RADIO_NIRQ_IntCtrl_0_ADDR:	equ	106h
RADIO_NIRQ_IntCtrl_1_ADDR:	equ	107h
RADIO_NIRQ_IntEn_ADDR:	equ	5h
RADIO_NIRQ_MASK:	equ	10h
; A_VREF_OUT address and mask equates
A_VREF_OUT_Data_ADDR:	equ	0h
A_VREF_OUT_DriveMode_0_ADDR:	equ	100h
A_VREF_OUT_DriveMode_1_ADDR:	equ	101h
A_VREF_OUT_DriveMode_2_ADDR:	equ	3h
A_VREF_OUT_GlobalSelect_ADDR:	equ	2h
A_VREF_OUT_IntCtrl_0_ADDR:	equ	102h
A_VREF_OUT_IntCtrl_1_ADDR:	equ	103h
A_VREF_OUT_IntEn_ADDR:	equ	1h
A_VREF_OUT_MASK:	equ	8h
; A_THERM_IN address and mask equates
A_THERM_IN_Data_ADDR:	equ	0h
A_THERM_IN_DriveMode_0_ADDR:	equ	100h
A_THERM_IN_DriveMode_1_ADDR:	equ	101h
A_THERM_IN_DriveMode_2_ADDR:	equ	3h
A_THERM_IN_GlobalSelect_ADDR:	equ	2h
A_THERM_IN_IntCtrl_0_ADDR:	equ	102h
A_THERM_IN_IntCtrl_1_ADDR:	equ	103h
A_THERM_IN_IntEn_ADDR:	equ	1h
A_THERM_IN_MASK:	equ	10h
; A_DIPSW address and mask equates
A_DIPSW_Data_ADDR:	equ	0h
A_DIPSW_DriveMode_0_ADDR:	equ	100h
A_DIPSW_DriveMode_1_ADDR:	equ	101h
A_DIPSW_DriveMode_2_ADDR:	equ	3h
A_DIPSW_GlobalSelect_ADDR:	equ	2h
A_DIPSW_IntCtrl_0_ADDR:	equ	102h
A_DIPSW_IntCtrl_1_ADDR:	equ	103h
A_DIPSW_IntEn_ADDR:	equ	1h
A_DIPSW_MASK:	equ	20h
; A_POT_IN address and mask equates
A_POT_IN_Data_ADDR:	equ	0h
A_POT_IN_DriveMode_0_ADDR:	equ	100h
A_POT_IN_DriveMode_1_ADDR:	equ	101h
A_POT_IN_DriveMode_2_ADDR:	equ	3h
A_POT_IN_GlobalSelect_ADDR:	equ	2h
A_POT_IN_IntCtrl_0_ADDR:	equ	102h
A_POT_IN_IntCtrl_1_ADDR:	equ	103h
A_POT_IN_IntEn_ADDR:	equ	1h
A_POT_IN_MASK:	equ	40h
; A_VBAT_IN address and mask equates
A_VBAT_IN_Data_ADDR:	equ	0h
A_VBAT_IN_DriveMode_0_ADDR:	equ	100h
A_VBAT_IN_DriveMode_1_ADDR:	equ	101h
A_VBAT_IN_DriveMode_2_ADDR:	equ	3h
A_VBAT_IN_GlobalSelect_ADDR:	equ	2h
A_VBAT_IN_IntCtrl_0_ADDR:	equ	102h
A_VBAT_IN_IntCtrl_1_ADDR:	equ	103h
A_VBAT_IN_IntEn_ADDR:	equ	1h
A_VBAT_IN_MASK:	equ	80h
; LED_YELLOW address and mask equates
LED_YELLOW_Data_ADDR:	equ	4h
LED_YELLOW_DriveMode_0_ADDR:	equ	104h
LED_YELLOW_DriveMode_1_ADDR:	equ	105h
LED_YELLOW_DriveMode_2_ADDR:	equ	7h
LED_YELLOW_GlobalSelect_ADDR:	equ	6h
LED_YELLOW_IntCtrl_0_ADDR:	equ	106h
LED_YELLOW_IntCtrl_1_ADDR:	equ	107h
LED_YELLOW_IntEn_ADDR:	equ	5h
LED_YELLOW_MASK:	equ	1h
; LED_RED address and mask equates
LED_RED_Data_ADDR:	equ	4h
LED_RED_DriveMode_0_ADDR:	equ	104h
LED_RED_DriveMode_1_ADDR:	equ	105h
LED_RED_DriveMode_2_ADDR:	equ	7h
LED_RED_GlobalSelect_ADDR:	equ	6h
LED_RED_IntCtrl_0_ADDR:	equ	106h
LED_RED_IntCtrl_1_ADDR:	equ	107h
LED_RED_IntEn_ADDR:	equ	5h
LED_RED_MASK:	equ	2h
; RADIO_MOSI address and mask equates
RADIO_MOSI_Data_ADDR:	equ	4h
RADIO_MOSI_DriveMode_0_ADDR:	equ	104h
RADIO_MOSI_DriveMode_1_ADDR:	equ	105h
RADIO_MOSI_DriveMode_2_ADDR:	equ	7h
RADIO_MOSI_GlobalSelect_ADDR:	equ	6h
RADIO_MOSI_IntCtrl_0_ADDR:	equ	106h
RADIO_MOSI_IntCtrl_1_ADDR:	equ	107h
RADIO_MOSI_IntEn_ADDR:	equ	5h
RADIO_MOSI_MASK:	equ	4h
; RADIO_NSEL address and mask equates
RADIO_NSEL_Data_ADDR:	equ	4h
RADIO_NSEL_DriveMode_0_ADDR:	equ	104h
RADIO_NSEL_DriveMode_1_ADDR:	equ	105h
RADIO_NSEL_DriveMode_2_ADDR:	equ	7h
RADIO_NSEL_GlobalSelect_ADDR:	equ	6h
RADIO_NSEL_IntCtrl_0_ADDR:	equ	106h
RADIO_NSEL_IntCtrl_1_ADDR:	equ	107h
RADIO_NSEL_IntEn_ADDR:	equ	5h
RADIO_NSEL_MASK:	equ	8h
; RADIO_NRESET address and mask equates
RADIO_NRESET_Data_ADDR:	equ	4h
RADIO_NRESET_DriveMode_0_ADDR:	equ	104h
RADIO_NRESET_DriveMode_1_ADDR:	equ	105h
RADIO_NRESET_DriveMode_2_ADDR:	equ	7h
RADIO_NRESET_GlobalSelect_ADDR:	equ	6h
RADIO_NRESET_IntCtrl_0_ADDR:	equ	106h
RADIO_NRESET_IntCtrl_1_ADDR:	equ	107h
RADIO_NRESET_IntEn_ADDR:	equ	5h
RADIO_NRESET_MASK:	equ	40h
; RADIO_SCLK address and mask equates
RADIO_SCLK_Data_ADDR:	equ	8h
RADIO_SCLK_DriveMode_0_ADDR:	equ	108h
RADIO_SCLK_DriveMode_1_ADDR:	equ	109h
RADIO_SCLK_DriveMode_2_ADDR:	equ	bh
RADIO_SCLK_GlobalSelect_ADDR:	equ	ah
RADIO_SCLK_IntCtrl_0_ADDR:	equ	10ah
RADIO_SCLK_IntCtrl_1_ADDR:	equ	10bh
RADIO_SCLK_IntEn_ADDR:	equ	9h
RADIO_SCLK_MASK:	equ	1h
; RADIO_MISO address and mask equates
RADIO_MISO_Data_ADDR:	equ	8h
RADIO_MISO_DriveMode_0_ADDR:	equ	108h
RADIO_MISO_DriveMode_1_ADDR:	equ	109h
RADIO_MISO_DriveMode_2_ADDR:	equ	bh
RADIO_MISO_GlobalSelect_ADDR:	equ	ah
RADIO_MISO_IntCtrl_0_ADDR:	equ	10ah
RADIO_MISO_IntCtrl_1_ADDR:	equ	10bh
RADIO_MISO_IntEn_ADDR:	equ	9h
RADIO_MISO_MASK:	equ	2h
; UART_TX address and mask equates
UART_TX_Data_ADDR:	equ	8h
UART_TX_DriveMode_0_ADDR:	equ	108h
UART_TX_DriveMode_1_ADDR:	equ	109h
UART_TX_DriveMode_2_ADDR:	equ	bh
UART_TX_GlobalSelect_ADDR:	equ	ah
UART_TX_IntCtrl_0_ADDR:	equ	10ah
UART_TX_IntCtrl_1_ADDR:	equ	10bh
UART_TX_IntEn_ADDR:	equ	9h
UART_TX_MASK:	equ	4h
; UART_RX address and mask equates
UART_RX_Data_ADDR:	equ	8h
UART_RX_DriveMode_0_ADDR:	equ	108h
UART_RX_DriveMode_1_ADDR:	equ	109h
UART_RX_DriveMode_2_ADDR:	equ	bh
UART_RX_GlobalSelect_ADDR:	equ	ah
UART_RX_IntCtrl_0_ADDR:	equ	10ah
UART_RX_IntCtrl_1_ADDR:	equ	10bh
UART_RX_IntEn_ADDR:	equ	9h
UART_RX_MASK:	equ	8h
; LED_GREEN address and mask equates
LED_GREEN_Data_ADDR:	equ	8h
LED_GREEN_DriveMode_0_ADDR:	equ	108h
LED_GREEN_DriveMode_1_ADDR:	equ	109h
LED_GREEN_DriveMode_2_ADDR:	equ	bh
LED_GREEN_GlobalSelect_ADDR:	equ	ah
LED_GREEN_IntCtrl_0_ADDR:	equ	10ah
LED_GREEN_IntCtrl_1_ADDR:	equ	10bh
LED_GREEN_IntEn_ADDR:	equ	9h
LED_GREEN_MASK:	equ	10h
; SW_REED address and mask equates
SW_REED_Data_ADDR:	equ	8h
SW_REED_DriveMode_0_ADDR:	equ	108h
SW_REED_DriveMode_1_ADDR:	equ	109h
SW_REED_DriveMode_2_ADDR:	equ	bh
SW_REED_GlobalSelect_ADDR:	equ	ah
SW_REED_IntCtrl_0_ADDR:	equ	10ah
SW_REED_IntCtrl_1_ADDR:	equ	10bh
SW_REED_IntEn_ADDR:	equ	9h
SW_REED_MASK:	equ	20h
; SW_S1 address and mask equates
SW_S1_Data_ADDR:	equ	8h
SW_S1_DriveMode_0_ADDR:	equ	108h
SW_S1_DriveMode_1_ADDR:	equ	109h
SW_S1_DriveMode_2_ADDR:	equ	bh
SW_S1_GlobalSelect_ADDR:	equ	ah
SW_S1_IntCtrl_0_ADDR:	equ	10ah
SW_S1_IntCtrl_1_ADDR:	equ	10bh
SW_S1_IntEn_ADDR:	equ	9h
SW_S1_MASK:	equ	40h
; RADIO_nPD address and mask equates
RADIO_nPD_Data_ADDR:	equ	8h
RADIO_nPD_DriveMode_0_ADDR:	equ	108h
RADIO_nPD_DriveMode_1_ADDR:	equ	109h
RADIO_nPD_DriveMode_2_ADDR:	equ	bh
RADIO_nPD_GlobalSelect_ADDR:	equ	ah
RADIO_nPD_IntCtrl_0_ADDR:	equ	10ah
RADIO_nPD_IntCtrl_1_ADDR:	equ	10bh
RADIO_nPD_IntEn_ADDR:	equ	9h
RADIO_nPD_MASK:	equ	80h