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📄 ind.s

📁 NecluesRTX RTOS的源码
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;/************************************************************************/
;/*                                                                      */
;/*              Copyright 1990 by Accelerated Technology                */
;/*                                                                      */
;/*  PROPRIETARY RIGHTS of Accelerated Technology are involved in the    */
;/*  subject matter of this material.  All manufacturing, reproduction,  */
;/*  use, and sales rights pertaining to this subject matter are         */
;/*  governed by the license agreement.  The buyer or recipient of this  */
;/*  package, implicitly accepts the terms of the license.               */
;/*                                                                      */
;/************************************************************************/
;
;/* Define processor - CPU32 */
        OPT     cpu_cpu32

;
; /* Define external references.  */
        import   INP_Initialize
        import   SKD_Interrupt_Context_Save
        import   SKD_Interrupt_Context_Restore
        import   SKD_Interrupt_Level
        import   CLD_Timer_Interrupt
        import   IN_Last_Memory_Address
        import   IN_Last_Address_Used
        import   IN_System_Stack_Size
        import   SKD_System_Stack_Ptr
;
; /* Define tags that are built by the linker.  */
        import   _end
        import   _startclr
;
;
        SECTION  .bss
;/* Define the interrupt vector table for the 68xxx system.  */
        SECTION  vectors
        export   _vectors
_vectors 
        DC.L     _end+50                    ; Initial Stack Value        0
        DC.L     IND_Initialize             ; Nucleus Starting Location  1
        DC.L     IND_Bus_Error              ; Bus Error                  2
        DC.L     IND_Address_Error          ; Address Error              3
        DC.L     IND_Illegal_Instruction    ; Illegal Instruction        4
        DC.L     IND_Zero_Divide            ; Divide by Zero             5
        DC.L     IND_Chk_Chk2               ; CHK and CHK2 Instructions  6
        DC.L     IND_TrapV                  ; TRAPV Instruction          7
        DC.L     IND_Privilege              ; Privilege Violation        8
        DC.L     IND_Trace                  ; Trace                      9
        DC.L     IND_Emul_A                 ; Emulate A                  10
        DC.L     IND_Emul_B                 ; Emulate B                  11
        DC.L     IND_Hdw_Breakpoint         ; Hardware Breakpoint        12
        DC.L     IND_Coprocessor_Violate    ; Coprocessor Violation      13
        DC.L     IND_Format_Error           ; Format Error               14
        DC.L     IND_Uninitialized_Int      ; Uninitialize Interrupt     15
        repeat   8
        DC.L     IND_Reserved               ; Reserved Interrupts     16-23
        DC.L     IND_Spurious               ; Spurious Interrupt         24
        DC.L     IND_Level_1_Auto           ; Level 1 Autovector         25
        DC.L     IND_Level_2_Auto           ; Level 2 Autovector         26
        DC.L     IND_Level_3_Auto           ; Level 3 Autovector         27
        DC.L     IND_Level_4_Auto           ; Level 4 Autovector         28
        DC.L     IND_Level_5_Auto           ; Level 5 Autovector         29
        DC.L     IND_Level_6_Auto           ; Level 6 Autovector         30
        DC.L     IND_Level_7_Auto           ; Level 7 Autovector         31
        DC.L     IND_Trap_0                 ; Trap 0                     32
        DC.L     IND_Trap_1                 ; Trap 1                     33
        DC.L     IND_Trap_2                 ; Trap 2                     34
        DC.L     IND_Trap_3                 ; Trap 3                     35
        DC.L     IND_Trap_4                 ; Trap 4                     36
        DC.L     IND_Trap_5                 ; Trap 5                     37
        DC.L     IND_Trap_6                 ; Trap 6                     38
        DC.L     IND_Trap_7                 ; Trap 7                     39
        DC.L     IND_Trap_8                 ; Trap 8                     40
        DC.L     IND_Trap_9                 ; Trap 9                     41
        DC.L     IND_Trap_10                ; Trap 10                    42
        DC.L     IND_Trap_11                ; Trap 11                    43
        DC.L     IND_Trap_12                ; Trap 12                    44
        DC.L     IND_Trap_13                ; Trap 13                    45
        DC.L     IND_Trap_14                ; Trap 14                    46
        DC.L     IND_Trap_15                ; Trap 15                    47
        repeat   11
        DC.L     IND_Copr_Reserved          ; Coprocessor Reserved    48-58
        repeat   5
        DC.L     IND_Reserved               ; Reserved Interrupts     59-63
        repeat   192
        DC.L     IND_User                   ; User Interrupts         64-255
;
;    /* Define Constants for the 68332 periodic timer.  */
;
CONFIG_CONTROL:         equ  $2041          ; Control Register
CONFIG_CONTROL_ADDR:    equ  $FFFA00        ; Control Register address
PROTECT:                equ  0              ; Disable Watchdog and Monitor
PROTECT_ADDR:           equ  $FFFA21        ; Protect Control Register Addr
PERIODIC_COUNTER:       equ  $52            ; 4 microseconds less than 10ms
PERIODIC_CONTROL:       equ  $219           ; Level 2, Autovector 1
PER_COUNTER_ADDR:       equ  $FFFA24        ; Address of counter register
PER_CONTROL_ADDR:       equ  $FFFA22        ; Address of control register
;
;
;
        SECTION  .text
;/************************************************************************/
;/*                                                                      */
;/*  FILE DESCRIPTION                                                    */
;/*                                                                      */
;/*  This file contains the target processor specific initialization     */
;/*  routines for the Motorola 68XXX processor.                          */
;/*                                                                      */
;/*  ROUTINES                                                            */
;/*                                                                      */
;/*      IND_Initialize                      Program entrance            */
;/*      IND_Set_Interrupt_Level             Enable/Disable interrupts   */
;/*      IND_Major_System_Error              Serious system error handler*/
;/*                                                                      */
;/*  NOTES                                                               */
;/*                                                                      */
;/*      This first routine must be loaded in a manner that facilitates  */
;/*      immediate processor execution following power-on or any type    */
;/*      of processor reset.  Since this file is processor dependent,    */
;/*      check the cross compiler on the development system for features */
;/*      such as in-line assembly language and/or compiling down to      */
;/*      assembly language and doing further modification in assembly.   */
;/*                                                                      */
;/************************************************************************/
;
;/* Include the necessary files.  */
;
;#include           "nu_defs.h"              /* General constants        */
;#include           "in_extr.h"              /* External references      */
;
;
;
;/************************************************************************/
;/*                                                                      */
;/*  FUNCTION                                "IND_Initialize"            */
;/*                                                                      */
;/*                                                                      */
;/*  DESCRIPTION                                                         */
;/*                                                                      */
;/*      This function is the first one executed after a power-up or a   */
;/*      system reset.  Hence, it is responsible for a considerable      */
;/*      amount of processor dependent initialization.  The 68xxx        */
;/*      port accomplishes the following sequencial activities:          */
;/*                                                                      */
;/*          Define the interrupt vector table                           */
;/*          Set up system stack pointer                                 */
;/*          Transfer control to the High Level Initialization routine   */
;/*          Define error interrupt handler entrances                    */
;/*                                                                      */
;/*  AUTHOR                                                              */
;/*                                                                      */
;/*      William E. Lamie,  Accelerated Technology                       */
;/*                                                                      */
;/*                                                                      */
;/*  CALLED FROM                                                         */
;/*                                                                      */
;/*      Hardware entrance                                               */
;/*                                                                      */
;/*  ROUTINES CALLED                                                     */
;/*                                                                      */
;/*      INP_Initialize                      High level initialization   */
;/*                                                                      */
;/*  INPUTS                                                              */
;/*                                                                      */
;/*      System Configuration Parameters                                 */
;/*                                                                      */
;/*  OUTPUTS                                                             */
;/*                                                                      */
;/*      Processor Configuration                                         */
;/*      System Stack                                                    */
;/*      Interrupt Vector Table                                          */
;/*                                                                      */
;/************************************************************************/
;void     IND_Initialize()
;{
        SECTION .text
        export  IND_Initialize
IND_Initialize
        export  main
main:
;
;void INP_Initialize();
;void CLD_Timer_Interrupt();
;
;    /* Initialize the various 68XXX control registers.  */
;
        MOVE    #$2700,SR                   ; Lockout interrupts 
                                            ; and clear Condition Codes
;
;    /* Initialize the vector table.  */
;
        MOVE.L  #_vectors,D0                ; Put vector base in D0
        MOVEC   D0,vbr                      ; Setup vector base register
;
;    /* 68332 Periodic Interrupt Timer.  Set up registers to generate
;       an interrupt every-so-often.  Other peripheral setup is accomplished
;       in a similar way.  */
;
        MOVEA.L #PROTECT_ADDR,A0           ; Protect Control Address
        MOVE.L  #PROTECT,D0                ; Value to place in register
        MOVE.B  D0,(A0)                    ; Setup the register
        MOVEA.L #PER_COUNTER_ADDR,A0       ; Put counter register addr in A0
        MOVEA.L #PER_CONTROL_ADDR,A1       ; Put control register addr in A1
        MOVE.L  #PERIODIC_COUNTER,D0       ;
        MOVE.W  D0,(A0)                    ; Put the count-down value in
        MOVE.L  #PERIODIC_CONTROL,D0       ;
        MOVE.W  D0,(A1)                    ; Set up the control register
        MOVEA.L #CONFIG_CONTROL_ADDR,A0    ; Configuration Control addr in A0
        MOVE.L  #CONFIG_CONTROL,D0         ; Put Control Setup in D0
        MOVE.W  D0,(A0)                    ; 
;
;    /* Clear the un-initialized part of memory.  */
;
        MOVE.L  #_startclr,A1               ; A1 has base of unitiailized RAM
        MOVE.L  IN_Last_Memory_Address,D0   ; D0 has the last address
IND_Memory_Clear:
        MOVE.L  #0,(A1)+                    ; Clear 4 bytes of memory
        CMP     A1,D0                       ; Are we at the end yet?
        BLE     IND_Memory_Clear           ; No, continue to clear memory
;
;    /* Setup the system stack pointer.  */
;
        MOVE.L  #_end,D1                    ; Calculate the last address
        MOVE.L  IN_System_Stack_Size,D0     ; Pick up the system stack size
        LSL.L   #2,D0                       ; Convert to bytes
        ADD.L   D0,D1                       ; System stack is in D0
        AND     #$FFFFFFFC,D1               ; Insure that there is long algn.
        MOVE.L  D1,A7                       ; Start using the stack pointer
        MOVE.L  D1,SKD_System_Stack_Ptr     ; Save the system stack pointer
; 
;    /* Update IN_Last_Address_Used with the address immediately following 
;       the system stack.  */
;
        MOVE.L  A7,D0                       ; Put the Bottom of Stack in D0
        ADD     #8,D0                       ; Increment the address
        MOVE.L  D0,IN_Last_Address_Used     ; Save it in the proper place
;
;    /* 68000 only, Clear the table that contains the nested interrupt
;       counter for each interrupt level and the stack switch flag for 
;       each level.  */
        CLR.L   SKD_Interrupt_Level         ; Clear counter for levels 0-3
        CLR.L   SKD_Interrupt_Level+4       ; Clear counter for levels 4-7
        CLR.L   SKD_Interrupt_Level+8       ; Clear stack switch flags 0-3
        CLR.L   SKD_Interrupt_Level+12      ; Clear stack switch flags 4-7
;
;    /* Call high-level, processor independent intialization.  */
;    INP_Initialize();
;
        BSR     INP_Initialize              ; We never come back 
;
;    /* Define interrupt handlers.  */
;
IND_Bus_Error:                             ; Bus Error                  2
        ;
        MOVE.L  #2,D0                       ; Put vector number in
        STOP    #$2700                      ; Stop with interrupt lockout
        ;
IND_Address_Error:                         ; Address Error              3
        ;
        MOVE.L  #3,D0                       ; Put vector number in
        STOP    #$2700                      ; Stop with interrupt lockout
        ;
IND_Illegal_Instruction:                   ; Illegal Instruction        4
        ;
        MOVE.L  #4,D0                       ; Put vector number in
        STOP    #$2700                      ; Stop with interrupt lockout
        ;
IND_Zero_Divide:                           ; Divide by Zero             5
        ;
        MOVE.L  #5,D0                       ; Put vector number in
        STOP    #$2700                      ; Stop with interrupt lockout
        ;
IND_Chk_Chk2:                              ; CHK and CHK2 Instructions  6
        ;
        MOVE.L  #6,D0                       ; Put vector number in
        STOP    #$2700                      ; Stop with interrupt lockout
        ;
IND_TrapV:                                 ; TRAPV Instruction          7
        ;
        MOVE.L  #7,D0                       ; Put vector number in

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