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📄 config.h

📁 VMware上运行vxWorks的BSP
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/* pc386/config.h - PC {3,4}86/Pentium{,2,3,4} configuration header *//* Copyright 1984-2003 Wind River Systems, Inc. *//* vxworks开发网 http://www.vxdev.com  *//*modification history--------------------01a 2008-3-24 23:30    modify by frank(http://www.vxdev.com)*/#ifndef	INCconfigh#define	INCconfigh#ifdef __cplusplusextern "C" {#endif/* BSP version/revision identification, before configAll.h */#define BSP_VER_1_1	1	/* 1.2 is backward compatible with 1.1 */#define BSP_VER_1_2	1#define BSP_VERSION	"1.2"	/* Tornado 2.2 is 1.2 */#define BSP_REV		"/3"	/* increment by whole numbers */#include "configAll.h"#include "pc.h"/* BSP specific prototypes that must be in config.h */#ifndef _ASMLANGUAGE    IMPORT void sysHwInit0 (void);    IMPORT UINT8 sysInumTbl[];		/* IRQ vs intNum table */#endif/* BSP specific initialisation (before cacheLibInit() is called) */#define INCLUDE_SYS_HW_INIT_0#define SYS_HW_INIT_0()         (sysHwInit0())/* CPU auto detection with sysCpuProbe() that support Intel CPUs for now */#define	INCLUDE_CPU_PROBE		/* define to perform sysCpuProbe() */#ifndef	INCLUDE_CPU_PROBE#   undef  CPU#   define CPU		PENTIUM		/* for CPU conditionals in BSP */#endif	/* INCLUDE_CPU_PROBE */#define X86CPU_DEFAULT	X86CPU_PENTIUM	/* for sysProcessor set in BSP *//* Default boot line */#if	(CPU == I80386)#define DEFAULT_BOOT_LINE \	"fd=0,0(0,0)host:/fd0/vxWorks.st h=90.0.0.3 e=90.0.0.50 u=target"#elif	(CPU == I80486)#define DEFAULT_BOOT_LINE \	"fd=0,0(0,0)host:/fd0/vxWorks.st h=90.0.0.3 e=90.0.0.50 u=target"#elif	(CPU == PENTIUM)#define DEFAULT_BOOT_LINE \	"lnPci(0,0)host:vxworks h=192.168.102.1 e=192.168.102.88 u=target pw=target"#elif	(CPU == PENTIUM2)#define DEFAULT_BOOT_LINE \	"fd=0,0(0,0)host:/fd0/vxWorks.st h=90.0.0.3 e=90.0.0.50 u=target"#elif	(CPU == PENTIUM3)#define DEFAULT_BOOT_LINE \	"fd=0,0(0,0)host:/fd0/vxWorks.st h=90.0.0.3 e=90.0.0.50 u=target"#elif	(CPU == PENTIUM4)#define DEFAULT_BOOT_LINE \	"fd=0,0(0,0)host:/fd0/vxWorks.st h=90.0.0.3 e=90.0.0.50 u=target"#endif	/* (CPU == I80386) *//* Warm boot (reboot) devices and parameters */#define SYS_WARM_BIOS 		0 	/* warm start from BIOS */#define SYS_WARM_FD   		1 	/* warm start from FD */#define SYS_WARM_ATA  		2	/* warm start from ATA */#define SYS_WARM_TFFS  		3	/* warm start from DiskOnChip */#define SYS_WARM_TYPE		SYS_WARM_BIOS  /* warm start device */#define SYS_WARM_FD_DRIVE       0       /* 0 = drive a:, 1 = b: */#define SYS_WARM_FD_TYPE        0       /* 0 = 3.5" 2HD, 1 = 5.25" 2HD */#define SYS_WARM_ATA_CTRL       0       /* controller 0 */#define SYS_WARM_ATA_DRIVE      0       /* 0 = c:, 1 = d: */#define SYS_WARM_TFFS_DRIVE     0       /* 0 = c: (DOC) *//* Warm boot (reboot) device and filename strings *//*  * BOOTROM_DIR is the device name for the device containing * the bootrom file. This string is used in sysToMonitor, sysLib.c  * in dosFsDevCreate(). */#define BOOTROM_DIR  "/vxboot/"/*  * BOOTROM_BIN is the default path and file name to either a binary  * bootrom file or an A.OUT file with its 32 byte header stripped. * Note that the first part of this string must match BOOTROM_DIR * The "bootrom.sys" file name will work with VxLd 1.5. */#define BOOTROM_BIN  "/vxboot/bootrom.sys"/*  * BOOTROM_AOUT is that default path and file name of an A.OUT bootrom * _still containing_ its 32byte A.OUT header.   This is legacy code. * Note that the first part of this string must match BOOTROM_DIR * The "bootrom.dat" file name does not work with VxLd 1.5. */#define BOOTROM_AOUT "/vxboot/bootrom.dat"/* IDT entry type options */#define SYS_INT_TRAPGATE 	0x0000ef00 	/* trap gate */#define SYS_INT_INTGATE  	0x0000ee00 	/* int gate *//* driver and file system options */#define	INCLUDE_DOSFS		/* include dosFs file system */#undef	INCLUDE_FD		/* include floppy disk driver */#define	INCLUDE_ATA		/* include IDE/EIDE(ATA) hard disk driver */#undef	INCLUDE_LPT		/* include parallel port driver */#undef	INCLUDE_TIMESTAMP	/* include TIMESTAMP timer for Wind View */#undef	INCLUDE_TFFS		/* include TrueFFS driver for Flash */#undef	INCLUDE_PCMCIA		/* include PCMCIA driver *//* TFFS driver options */#ifdef	INCLUDE_TFFS#   define INCLUDE_SHOW_ROUTINES#endif	/* INCLUDE_TFFS *//* SCSI driver options */#undef	INCLUDE_SCSI            /* include SCSI driver */#undef	INCLUDE_AIC_7880        /* include AIC 7880 SCSI driver */#undef	INCLUDE_SCSI_BOOT       /* include ability to boot from SCSI */#undef	INCLUDE_CDROMFS         /* file system to be used */#undef	INCLUDE_TAPEFS          /* file system to be used */#undef	INCLUDE_SCSI2           /* select SCSI2 not SCSI1 *//* Network driver options */#define INCLUDE_END             /* Enhanced Network Driver Support */#undef  INCLUDE_DEC21X40_END    /* (END) DEC 21x4x PCI interface */#undef  INCLUDE_EL_3C90X_END    /* (END) 3Com Fast EtherLink XL PCI */#undef  INCLUDE_ELT_3C509_END   /* (END) 3Com EtherLink III interface */#undef  INCLUDE_ENE_END         /* (END) Eagle/Novell NE2000 interface */#undef	INCLUDE_FEI_END         /* (END) Intel 8255[7/8/9] PCI interface */#undef	INCLUDE_GEI8254X_END    /* (END) Intel 82543/82544 PCI interface */#define  INCLUDE_LN_97X_END      /* (END) AMD 79C97x PCI interface */#undef  INCLUDE_ULTRA_END       /* (END) SMC Elite16 Ultra interface */#undef  INCLUDE_BSD             /* BSD / Netif Driver Support (Deprecated) */#undef  INCLUDE_EEX             /* (BSD) Intel EtherExpress interface */#undef  INCLUDE_EEX32           /* (BSD) Intel EtherExpress flash 32 */#undef  INCLUDE_ELC             /* (BSD) SMC Elite16 interface */#undef  INCLUDE_ESMC            /* (BSD) SMC 91c9x Ethernet interface *//* PCMCIA driver options */#ifdef  INCLUDE_PCMCIA#   define INCLUDE_ATA          /* include ATA driver */#   define INCLUDE_SRAM         /* include SRAM driver */#   undef INCLUDE_TFFS          /* include TFFS driver */#   ifdef INCLUDE_NETWORK#       define INCLUDE_BSD      /* include BSD / Netif Driver Support */#       define INCLUDE_ELT      /* (BSD) 3Com EtherLink III interface */#   endif /* INCLUDE_NETWORK */#endif  /* INCLUDE_PCMCIA *//* Include PCI support for drivers & libraries that require it. */#if defined (INCLUDE_LN_97X_END)   || defined (INCLUDE_EL_3C90X_END) || \    defined (INCLUDE_FEI_END)      || defined (INCLUDE_DEC21X40_END) || \    defined (INCLUDE_GEI8254X_END) || defined (INCLUDE_AIC_7880)     || \    defined (INCLUDE_WINDML)       || defined (INCLUDE_USB)#   define INCLUDE_PCI#endif/* default MMU options and PHYS_MEM_DESC type state constants */#define INCLUDE_MMU_BASIC       /* bundled MMU support */#undef  VM_PAGE_SIZE		/* page size */#define VM_PAGE_SIZE		PAGE_SIZE_4KB	/* default page size */#define VM_STATE_MASK_FOR_ALL \	VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE#define VM_STATE_FOR_IO \	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT#define VM_STATE_FOR_MEM_OS \	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE#define VM_STATE_FOR_MEM_APPLICATION \	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE#define VM_STATE_FOR_PCI \	VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT/* default system and auxiliary clock constants * * Among other things, SYS_CLK_RATE_MAX depends upon the CPU and application * work load.  The default value, chosen in order to pass the internal test * suite, could go up to PIT_CLOCK. */#define SYS_CLK_RATE_MIN    (19)           /* minimum system clock rate */#define AUX_CLK_RATE_MIN    (2)            /* minimum auxiliary clock rate */#define AUX_CLK_RATE_MAX    (8192)         /* maximum auxiliary clock rate *//* CPU family/type-specific macros and options */#if	(CPU == I80386) || (CPU == I80486) /* [34]86 specific macros *//* * software floating point emulation support. DO NOT undefine hardware fp * support in configAll.h as it is required for software fp emulation. */#define INCLUDE_SW_FP		/* enable emulator if there is no FPU */#define SYS_CLK_RATE_MAX	(PIT_CLOCK/32) /* max system clock rate */#ifdef	INCLUDE_TIMESTAMP#   define INCLUDE_TIMESTAMP_PIT2 /* include PIT2 for timestamp */#endif	/* INCLUDE_TIMESTAMP */#elif	(CPU == PENTIUM)	/* P5 specific macros */#undef	INCLUDE_SW_FP		/* Pentium has hardware FPP */#undef	USER_D_CACHE_MODE	/* Pentium write-back data cache support */#define	USER_D_CACHE_MODE	(CACHE_COPYBACK | CACHE_SNOOP_ENABLE)#undef	INCLUDE_PMC		/* include PMC */#define SYS_CLK_RATE_MAX	(PIT_CLOCK/32) /* max system clock rate */#ifdef	INCLUDE_TIMESTAMP	/* select TSC(default) or PIT2 */#   undef  INCLUDE_TIMESTAMP_PIT2 /* include PIT2 for timestamp */#   define INCLUDE_TIMESTAMP_TSC  /* include TSC for timestamp */#   define PENTIUMPRO_TSC_FREQ	0 /* TSC freq, 0 for auto detect */#endif	/* INCLUDE_TIMESTAMP */#elif	(CPU == PENTIUM2) || (CPU == PENTIUM3) || (CPU == PENTIUM4) /* P6,P7 */#undef	INCLUDE_SW_FP		/* Pentium[234] has hardware FPP */#undef	USER_D_CACHE_MODE	/* Pentium[234] write-back data cache support */#define	USER_D_CACHE_MODE	(CACHE_COPYBACK | CACHE_SNOOP_ENABLE)#define	INCLUDE_MTRR_GET	/* get MTRR to sysMtrr[] */#define	INCLUDE_PMC		/* include PMC */#undef	VIRTUAL_WIRE_MODE	/* Interrupt Mode: Virtual Wire Mode */#undef	SYMMETRIC_IO_MODE	/* Interrupt Mode: Symmetric IO Mode */#define SYS_CLK_RATE_MAX	(PIT_CLOCK/16) /* max system clock rate */#ifdef	INCLUDE_TIMESTAMP         /* select TSC(default) or PIT2 */#   undef  INCLUDE_TIMESTAMP_PIT2 /* include PIT2 for timestamp */#   define INCLUDE_TIMESTAMP_TSC  /* include TSC for timestamp */#   define PENTIUMPRO_TSC_FREQ	0 /* TSC freq, 0 for auto detect */#endif	/* INCLUDE_TIMESTAMP */#define	INCLUDE_MMU_P6_32BIT	/* include 32bit MMU for Pentium[234] */#ifdef	INCLUDE_MMU_P6_32BIT#   undef  VM_PAGE_SIZE		/* page size could be 4KB, 4MB */#   define VM_PAGE_SIZE		PAGE_SIZE_4KB	/* PAGE_SIZE_4MB */#endif	/* INCLUDE_MMU_P6_32BIT */#ifdef	INCLUDE_MMU_P6_36BIT#   undef  VM_PAGE_SIZE		/* page size could be 4KB, 2MB */#   define VM_PAGE_SIZE		PAGE_SIZE_4KB	/* PAGE_SIZE_2MB */#endif	/* INCLUDE_MMU_P6_32BIT */#if	defined (INCLUDE_MMU_P6_32BIT) || defined (INCLUDE_MMU_P6_36BIT) #   undef  VM_STATE_MASK_FOR_ALL#   undef  VM_STATE_FOR_IO#   undef  VM_STATE_FOR_MEM_OS#   undef  VM_STATE_FOR_MEM_APPLICATION#   undef  VM_STATE_FOR_PCI#   define VM_STATE_MASK_FOR_ALL \	   VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | \	   VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_WBACK | VM_STATE_MASK_GLOBAL#   define VM_STATE_FOR_IO \	   VM_STATE_VALID | VM_STATE_WRITABLE | \	   VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT#   define VM_STATE_FOR_MEM_OS \	   VM_STATE_VALID | VM_STATE_WRITABLE | \	   VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT#   define VM_STATE_FOR_MEM_APPLICATION \	   VM_STATE_VALID | VM_STATE_WRITABLE | \	   VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT#   define VM_STATE_FOR_PCI \	   VM_STATE_VALID | VM_STATE_WRITABLE | \	   VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT#endif	/* defined (INCLUDE_MMU_P6_32BIT) || defined (INCLUDE_MMU_P6_36BIT) *//*  * To enable the IOAPIC, define the mother board from the following list. * If the IOAPIC is already enabled, defining the mother board is not  * needed.  Related code locates in pciCfgIntStub.c. *   D815EEA = Pentium3 + i815e + ICH2(i82801BA) *   D850GB  = Pentium4 + i850  + ICH2(i82801BA) * The PIRQ[n] is directly handled by IOAPIC in the SYMMETRIC_IO_MODE. */#undef	INCLUDE_D815EEA		/* Pentium3 + i815e + ICH2 */#undef	INCLUDE_D850GB		/* Pentium4 + i850  + ICH2 */#if	defined (INCLUDE_D815EEA) || defined (INCLUDE_D850GB)#   define INCLUDE_ICH2		/* ICH2 IO controller hub */#else#   if	(CPU == PENTIUM4)#       define INCLUDE_ICH3	/* set ICH3 as default */#   endif /* (CPU == PENTIUM4) */#endif	/* defined (INCLUDE_D815EEA) || defined (INCLUDE_D850GB) */#if	(CPU == PENTIUM4) && \	(defined (VIRTUAL_WIRE_MODE) || defined (SYMMETRIC_IO_MODE))#   define INCLUDE_THERM_MONITOR	/* Thermal Monitor and GV 3 */#   ifdef  INCLUDE_THERM_MONITOR#       define TM_MODE       GV3_AUTO	/* automatic Thermal Management */#       define TM_AC_CHK_RTN NULL	/* AC power check routine */#   endif /* INCLUDE_THERM_MONITOR */

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