📄 main.lst
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ARM COMPILER V2.53, main 18/11/07 00:38:34 PAGE 1
ARM COMPILER V2.53, COMPILATION OF MODULE main
OBJECT MODULE PLACED IN main.OBJ
COMPILER INVOKED BY: D:\Program Files\keil\ARM\BIN\CA.exe main.c THUMB BROWSE DEBUG TABS(4)
stmt level source
1 /*********************************************************************
2 Author : likee www.ednchina.com/blog/likee
3 Date : Nov.18 2007
4 File : main.c
5 Hardware : Applicable to ADuC7026 test board
6 Description : DAC outputs an intermittent Sine Wave on pin 10 (DAC1)
7
8 edition ：V1.0
9 Copyright(C) likee 2007-2016
10 All rigths reserved
11 ***********************************************************************/
12
13
14 #include <ADuC7026.h>
15 #include "my_type.h"
16 #include "DAC.h"
17
18 ///////////////////////////////////////////////////////////////////////////
19 //function : initial the system
20 void sys_initial( void )
21 {
22 1 PLLKEY1 = 0xAA;
23 1 PLLCON = 0x01; //PLL + 32kHz oscillator – default configuration
24 1 PLLKEY2 = 0x55;
25 1 POWKEY1 = 0x01;
26 1 POWCON = 0x00; //the clock configured as 45.088M
27 1 POWKEY2 = 0xF4;
28 1 }
29 ////////////////////////////////////////////////////////////////////////////
30
31
32 // Table is placed in Flash/EE
33 const uint32 TableS[64] = {
34 0x07FF0000, 0x08C80000, 0x098E0000, 0x0A510000, 0x0B0F0000, 0x0BC40000, 0x0C710000, 0x0D120000,
35 0x0DA70000, 0x0E2E0000, 0x0EA50000, 0x0F0D0000, 0x0F630000, 0x0FA60000, 0x0FD70000, 0x0FF50000,
36 0x0FFF0000, 0x0FF50000, 0x0FD70000, 0x0FA60000, 0x0F630000, 0x0F0D0000, 0x0EA50000, 0x0E2E0000,
37 0x0DA70000, 0x0D120000, 0x0C710000, 0x0BC40000, 0x0B0F0000, 0x0A510000, 0x098E0000, 0x08C80000,
38 0x07FF0000, 0x07360000, 0x06700000, 0x05AD0000, 0x04EF0000, 0x043A0000, 0x038D0000, 0x02EC0000,
39 0x02570000, 0x01D00000, 0x01590000, 0x00F10000, 0x009B0000, 0x00580000, 0x00270000, 0x00090000,
40 0x00000000, 0x00090000, 0x00270000, 0x00580000, 0x009B0000, 0x00F10000, 0x01590000, 0x01D00000,
41 0x02570000, 0x02EC0000, 0x038D0000, 0x043A0000, 0x04EF0000, 0x05AD0000, 0x06700000, 0x07360000
42 };
43
44 /***************************************************************************/
45
46 void main( void )
47 {
48 1 uint32 i;
49 1 sys_initial();
50 1 DAC_Initial();
51 1
52 1 while( 1 )
53 1 {
54 2 for( i =0;i<64;i++ )
55 2 {
56 3 DAC0DAT = TableS[i];
57 3 i++;
58 3 }
59 2 }
ARM COMPILER V2.53, main 18/11/07 00:38:34 PAGE 2
60 1 }
ARM COMPILER V2.53, main 18/11/07 00:38:34 PAGE 3
ASSEMBLY LISTING OF GENERATED OBJECT CODE
*** EXTERNALS:
EXTERN CODE16 (DAC_Initial?T)
EXTERN NUMBER (__startup)
*** PUBLICS:
PUBLIC sys_initial?T
PUBLIC main
PUBLIC TableS
*** DATA SEGMENT '?CON?main':
00000000 TableS:
00000000 BEGIN_INIT
00000000 07FF0000 DD 0x7FF0000
00000004 08C80000 DD 0x8C80000
00000008 098E0000 DD 0x98E0000
0000000C 0A510000 DD 0xA510000
00000010 0B0F0000 DD 0xB0F0000
00000014 0BC40000 DD 0xBC40000
00000018 0C710000 DD 0xC710000
0000001C 0D120000 DD 0xD120000
00000020 0DA70000 DD 0xDA70000
00000024 0E2E0000 DD 0xE2E0000
00000028 0EA50000 DD 0xEA50000
0000002C 0F0D0000 DD 0xF0D0000
00000030 0F630000 DD 0xF630000
00000034 0FA60000 DD 0xFA60000
00000038 0FD70000 DD 0xFD70000
0000003C 0FF50000 DD 0xFF50000
00000040 0FFF0000 DD 0xFFF0000
00000044 0FF50000 DD 0xFF50000
00000048 0FD70000 DD 0xFD70000
0000004C 0FA60000 DD 0xFA60000
00000050 0F630000 DD 0xF630000
00000054 0F0D0000 DD 0xF0D0000
00000058 0EA50000 DD 0xEA50000
0000005C 0E2E0000 DD 0xE2E0000
00000060 0DA70000 DD 0xDA70000
00000064 0D120000 DD 0xD120000
00000068 0C710000 DD 0xC710000
0000006C 0BC40000 DD 0xBC40000
00000070 0B0F0000 DD 0xB0F0000
00000074 0A510000 DD 0xA510000
00000078 098E0000 DD 0x98E0000
0000007C 08C80000 DD 0x8C80000
00000080 07FF0000 DD 0x7FF0000
00000084 07360000 DD 0x7360000
00000088 06700000 DD 0x6700000
0000008C 05AD0000 DD 0x5AD0000
00000090 04EF0000 DD 0x4EF0000
00000094 043A0000 DD 0x43A0000
00000098 038D0000 DD 0x38D0000
0000009C 02EC0000 DD 0x2EC0000
000000A0 02570000 DD 0x2570000
000000A4 01D00000 DD 0x1D00000
000000A8 01590000 DD 0x1590000
000000AC 00F10000 DD 0xF10000
000000B0 009B0000 DD 0x9B0000
000000B4 00580000 DD 0x580000
000000B8 00270000 DD 0x270000
000000BC 00090000 DD 0x90000
000000C0 00000000 DD 0x0
000000C4 00090000 DD 0x90000
000000C8 00270000 DD 0x270000
ARM COMPILER V2.53, main 18/11/07 00:38:34 PAGE 4
000000CC 00580000 DD 0x580000
000000D0 009B0000 DD 0x9B0000
000000D4 00F10000 DD 0xF10000
000000D8 01590000 DD 0x1590000
000000DC 01D00000 DD 0x1D00000
000000E0 02570000 DD 0x2570000
000000E4 02EC0000 DD 0x2EC0000
000000E8 038D0000 DD 0x38D0000
000000EC 043A0000 DD 0x43A0000
000000F0 04EF0000 DD 0x4EF0000
000000F4 05AD0000 DD 0x5AD0000
000000F8 06700000 DD 0x6700000
000000FC 07360000 DD 0x7360000
00000100 END_INIT
*** CODE SEGMENT '?PR?sys_initial?T?main':
22: PLLKEY1 = 0xAA;
00000000 21AA MOV R1,#0xAA
00000002 4800 LDR R0,=0xFFFF0410
00000004 6001 STR R1,[R0,#0x0]
23: PLLCON = 0x01; //PLL + 32kHz oscillator – default configuration
00000006 2101 MOV R1,#0x1
00000008 4800 LDR R0,=0xFFFF0414
0000000A 6001 STR R1,[R0,#0x0]
24: PLLKEY2 = 0x55;
0000000C 2255 MOV R2,#0x55
0000000E 4800 LDR R0,=0xFFFF0418
00000010 6002 STR R2,[R0,#0x0]
25: POWKEY1 = 0x01;
00000012 4800 LDR R0,=0xFFFF0404
00000014 6001 STR R1,[R0,#0x0]
26: POWCON = 0x00; //the clock configured as 45.088M
00000016 2100 MOV R1,#0x0
00000018 4800 LDR R0,=0xFFFF0408
0000001A 6001 STR R1,[R0,#0x0]
27: POWKEY2 = 0xF4;
0000001C 21F4 MOV R1,#0xF4
0000001E 4800 LDR R0,=0xFFFF040C
00000020 6001 STR R1,[R0,#0x0]
28: }
00000022 4770 BX R14
00000024 ENDP ; 'sys_initial?T'
*** CODE SEGMENT '?PR?main?main':
46: void main( void )
00000000 B500 PUSH {LR}
47: {
00000002 ; SCOPE-START
49: sys_initial();
00000002 F7FF BL sys_initial?T ; T=0x0001 (1)
00000004 FFFD BL sys_initial?T ; T=0x0001 (2)
50: DAC_Initial();
00000006 F7FF BL DAC_Initial?T ; T=0x0001 (1)
00000008 FFFB BL DAC_Initial?T ; T=0x0001 (2)
54: for( i =0;i<64;i++ )
0000000A L_9:
0000000A 2000 MOV R0,#0x0
0000000C ---- Variable 'i' assigned to Register 'R0' ----
0000000C L_8:
56: DAC0DAT = TableS[i];
0000000C 1C02 MOV R2,R0 ; i
0000000E 0092 LSL R2,R2,#0x2 ; i
00000010 4800 LDR R1,=TableS ; TableS
00000012 588A LDR R2,[R1,R2]
00000014 4800 LDR R1,=0xFFFF0604
00000016 600A STR R2,[R1,#0x0]
57: i++;
ARM COMPILER V2.53, main 18/11/07 00:38:34 PAGE 5
00000018 3001 ADD R0,#0x1
58: }
0000001A 3001 ADD R0,#0x1
0000001C 1C01 MOV R1,R0 ; i
0000001E 2940 CMP R1,#0x40 ; i
00000020 D3F4 BCC L_8 ; T=0x0000000C
59: }
00000022 E7F2 B L_9 ; T=0x0000000A
00000024 ; SCOPE-END
00000024 BC08 POP {R3}
00000026 4718 BX R3
00000028 ENDP ; 'main'
Module Information Static
----------------------------------
code size = ------
data size = ------
const size = 256
End of Module Information.
ARM COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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