📄 cc1100.lst
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C51 COMPILER V8.02 CC1100 11/15/2007 11:37:22 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE CC1100
OBJECT MODULE PLACED IN CC1100.OBJ
COMPILER INVOKED BY: C:\silabs\IDEfiles\C51\BIN\C51.exe CC1100.h DB OE
line level source
1 #ifndef CC1100_H
2 #define CC1100_H
3
4
5 #define LOW 0
6 #define HIGH 1
7 #define INT8U unsigned char
8 #define INT16U unsigned int
9
10
11
12
13
14 //-------------------------------------------------------------------------------------------------------
15 // RF_SETTINGS is a data structure which contains all relevant CCxxx0 registers
16 typedef struct S_RF_SETTINGS{
17 INT8U FSCTRL2; //自已加的
18 INT8U FSCTRL1; // Frequency synthesizer control.
19 INT8U FSCTRL0; // Frequency synthesizer control.
20 INT8U FREQ2; // Frequency control word, high INT8U.
21 INT8U FREQ1; // Frequency control word, middle INT8U.
22 INT8U FREQ0; // Frequency control word, low INT8U.
23 INT8U MDMCFG4; // Modem configuration.
24 INT8U MDMCFG3; // Modem configuration.
25 INT8U MDMCFG2; // Modem configuration.
26 INT8U MDMCFG1; // Modem configuration.
27 INT8U MDMCFG0; // Modem configuration.
28 INT8U CHANNR; // Channel number.
29 INT8U DEVIATN; // Modem deviation setting (when FSK modulation is enabled).
30 INT8U FREND1; // Front end RX configuration.
31 INT8U FREND0; // Front end RX configuration.
32 INT8U MCSM0; // Main Radio Control State Machine configuration.
33 INT8U FOCCFG; // Frequency Offset Compensation Configuration.
34 INT8U BSCFG; // Bit synchronization Configuration.
35 INT8U AGCCTRL2; // AGC control.
36 INT8U AGCCTRL1; // AGC control.
37 INT8U AGCCTRL0; // AGC control.
38 INT8U FSCAL3; // Frequency synthesizer calibration.
39 INT8U FSCAL2; // Frequency synthesizer calibration.
40 INT8U FSCAL1; // Frequency synthesizer calibration.
41 INT8U FSCAL0; // Frequency synthesizer calibration.
42 INT8U FSTEST; // Frequency synthesizer calibration control
43 INT8U TEST2; // Various test settings.
44 INT8U TEST1; // Various test settings.
45 INT8U TEST0; // Various test settings.
46 INT8U IOCFG2; // GDO2 output pin configuration
47 INT8U IOCFG0; // GDO0 output pin configuration
48 INT8U PKTCTRL1; // Packet automation control.
49 INT8U PKTCTRL0; // Packet automation control.
50 INT8U ADDR; // Device address.
51 INT8U PKTLEN; // Packet length.
52 } RF_SETTINGS;
53
54
55
C51 COMPILER V8.02 CC1100 11/15/2007 11:37:22 PAGE 2
56 //------------------------------------------------------------------------------------------------------
57 // CC2500/CC1100 STROBE, CONTROL AND STATUS REGSITER
58 #define CCxxx0_IOCFG2 0x00 // GDO2 output pin configuration
59 #define CCxxx0_IOCFG1 0x01 // GDO1 output pin configuration
60 #define CCxxx0_IOCFG0 0x02 // GDO0 output pin configuration
61 #define CCxxx0_FIFOTHR 0x03 // RX FIFO and TX FIFO thresholds
62 #define CCxxx0_SYNC1 0x04 // Sync word, high INT8U
63 #define CCxxx0_SYNC0 0x05 // Sync word, low INT8U
64 #define CCxxx0_PKTLEN 0x06 // Packet length
65 #define CCxxx0_PKTCTRL1 0x07 // Packet automation control
66 #define CCxxx0_PKTCTRL0 0x08 // Packet automation control
67 #define CCxxx0_ADDR 0x09 // Device address
68 #define CCxxx0_CHANNR 0x0A // Channel number
69 #define CCxxx0_FSCTRL1 0x0B // Frequency synthesizer control
70 #define CCxxx0_FSCTRL0 0x0C // Frequency synthesizer control
71 #define CCxxx0_FREQ2 0x0D // Frequency control word, high INT8U
72 #define CCxxx0_FREQ1 0x0E // Frequency control word, middle INT8U
73 #define CCxxx0_FREQ0 0x0F // Frequency control word, low INT8U
74 #define CCxxx0_MDMCFG4 0x10 // Modem configuration
75 #define CCxxx0_MDMCFG3 0x11 // Modem configuration
76 #define CCxxx0_MDMCFG2 0x12 // Modem configuration
77 #define CCxxx0_MDMCFG1 0x13 // Modem configuration
78 #define CCxxx0_MDMCFG0 0x14 // Modem configuration
79 #define CCxxx0_DEVIATN 0x15 // Modem deviation setting
80 #define CCxxx0_MCSM2 0x16 // Main Radio Control State Machine configuration
81 #define CCxxx0_MCSM1 0x17 // Main Radio Control State Machine configuration
82 #define CCxxx0_MCSM0 0x18 // Main Radio Control State Machine configuration
83 #define CCxxx0_FOCCFG 0x19 // Frequency Offset Compensation configuration
84 #define CCxxx0_BSCFG 0x1A // Bit Synchronization configuration
85 #define CCxxx0_AGCCTRL2 0x1B // AGC control
86 #define CCxxx0_AGCCTRL1 0x1C // AGC control
87 #define CCxxx0_AGCCTRL0 0x1D // AGC control
88 #define CCxxx0_WOREVT1 0x1E // High INT8U Event 0 timeout
89 #define CCxxx0_WOREVT0 0x1F // Low INT8U Event 0 timeout
90 #define CCxxx0_WORCTRL 0x20 // Wake On Radio control
91 #define CCxxx0_FREND1 0x21 // Front end RX configuration
92 #define CCxxx0_FREND0 0x22 // Front end TX configuration
93 #define CCxxx0_FSCAL3 0x23 // Frequency synthesizer calibration
94 #define CCxxx0_FSCAL2 0x24 // Frequency synthesizer calibration
95 #define CCxxx0_FSCAL1 0x25 // Frequency synthesizer calibration
96 #define CCxxx0_FSCAL0 0x26 // Frequency synthesizer calibration
97 #define CCxxx0_RCCTRL1 0x27 // RC oscillator configuration
98 #define CCxxx0_RCCTRL0 0x28 // RC oscillator configuration
99 #define CCxxx0_FSTEST 0x29 // Frequency synthesizer calibration control
100 #define CCxxx0_PTEST 0x2A // Production test
101 #define CCxxx0_AGCTEST 0x2B // AGC test
102 #define CCxxx0_TEST2 0x2C // Various test settings
103 #define CCxxx0_TEST1 0x2D // Various test settings
104 #define CCxxx0_TEST0 0x2E // Various test settings
105
106 // Strobe commands
107 #define CCxxx0_SRES 0x30 // Reset chip.
108 #define CCxxx0_SFSTXON 0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL
-=1).
109 // If in RX/TX: Go to a wait state where only the synthesizer is
110 // running (for quick RX / TX turnaround).
111 #define CCxxx0_SXOFF 0x32 // Turn off crystal oscillator.
112 #define CCxxx0_SCAL 0x33 // Calibrate frequency synthesizer and turn it off
113 // (enables quick start).
114 #define CCxxx0_SRX 0x34 // Enable RX. Perform calibration first if coming from IDLE and
115 // MCSM0.FS_AUTOCAL=1.
116 #define CCxxx0_STX 0x35 // In IDLE state: Enable TX. Perform calibration first if
C51 COMPILER V8.02 CC1100 11/15/2007 11:37:22 PAGE 3
117 // MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
118 // Only go to TX if channel is clear.
119 #define CCxxx0_SIDLE 0x36 // Exit RX / TX, turn off frequency synthesizer and exit
120 // Wake-On-Radio mode if applicable.
121 #define CCxxx0_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
122 #define CCxxx0_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
123 #define CCxxx0_SPWD 0x39 // Enter power down mode when CSn goes high.
124 #define CCxxx0_SFRX 0x3A // Flush the RX FIFO buffer.
125 #define CCxxx0_SFTX 0x3B // Flush the TX FIFO buffer.
126 #define CCxxx0_SWORRST 0x3C // Reset real time clock.
127 #define CCxxx0_SNOP 0x3D // No operation. May be used to pad strobe commands to two
128 // INT8Us for simpler software.
129
130 #define CCxxx0_PARTNUM 0x30
131 #define CCxxx0_VERSION 0x31
132 #define CCxxx0_FREQEST 0x32
133 #define CCxxx0_LQI 0x33
134 #define CCxxx0_RSSI 0x34
135 #define CCxxx0_MARCSTATE 0x35
136 #define CCxxx0_WORTIME1 0x36
137 #define CCxxx0_WORTIME0 0x37
138 #define CCxxx0_PKTSTATUS 0x38
139 #define CCxxx0_VCO_VC_DAC 0x39
140 #define CCxxx0_TXBYTES 0x3A
141 #define CCxxx0_RXBYTES 0x3B
142
143 #define CCxxx0_PATABLE 0x3E
144 #define CCxxx0_TXFIFO 0x3F
145 #define CCxxx0_RXFIFO 0x3F
146
147
148
149
150 //------------------------------------------------------------------------------------------------------
151 // Chipcon
152 // Product = CC1100
153 // Chip version = E
154 // Crystal accuracy = 40 ppm
155 // X-tal frequency = 26 MHz
156 // RF output power = 0 dBm
157 // RX filterbandwidth = 540.000000 kHz
158 // Deviation = 0.000000
159 // Datarate = 250.000000 kbps
160 // Modulation = (7) MSK
161 // Manchester enable = (0) Manchester disabled
162 // RF Frequency = 433.000000 MHz
163 // Channel spacing = 199.951172 kHz
164 // Channel number = 0
165 // Optimization = Sensitivity
166 // Sync mode = (3) 30/32 sync word bits detected
167 // Format of RX/TX data = (0) Normal mode, use FIFOs for RX and TX
168 // CRC operation = (1) CRC calculation in TX and CRC check in RX enabled
169 // Forward Error Correction = (0) FEC disabled
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